万兆FCoE监控卡硬件的设计与实现

发布时间：2018-02-15 23:22

本文关键词： 万兆FCoE 监控 FPGA　出处：《电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：随着科学技术的飞速发展,信息、数据处理和互联网等技术也逐渐融入到人们的日常工作和生活当中。对数据信息处理速度要求的不断提高促使了数据中心的高速发展。数据中心中常见的网络有最初的区域网络(LAN)、存储网络(SAN)等,但前面两者之间都有不足之处,此时就产生了融合两者的FCo E技术。针对FCoE技术出现了融合网络适配器(CNA)以及能处理FCoE的交换机、磁盘阵列、分析仪等。随着这些设备的广泛应用,基于FCoE的网络和设备之间的信息交互变得越来越复杂,同时对这些网络和设备性能的要求也越来越高,而且这些设备的数据通信都不是透明的,为了能及时了解设备的通信情况,避免产生不必要的时间和经济损失,此时就需要能够对这些设备进行实时监控。而针对FCoE网络的监控测试设备的研究就有一定的经济意义。本文研究的是基于万兆FCoE的监控卡,用于捕获和分析万兆FCoE网络上的数据。本文的硬件部分主要是实时将从10G以太网链路上捕获的数据通过PCI Epress 2.0总线写入主机内存,用于在主机界面上显示抓获的数据情况如数据类型、数据总量、接收数据速率等,以便于对此时设备的通信情况能够实时的了解。同时用户能够通过设置触发条件和过滤规则控制底层硬件对接收到的帧进行触发和过滤,这样用户可以提取所需要的帧而丢弃那些不需要的帧数据,能够节省时间提高工作效率。本文监控卡的实现是基于FPGA的,采用Xilinx公司的Kintex-7XC7K325T开发板。本文先简单介绍了光纤通道协议、万兆以太网、FCoE协议、DMA技术和PCI Express总线技术,通过分析监控卡的功能需求提出了监控卡的总体设计方案;对设计中的两大部分FCoE接口和DMA控制器分别进行了详细介绍,并对这两个模块通过Modelsim仿真工具进行了功能仿真;在功能仿真符合设计要求后,和软件进行联合测试,通过ISE工具将硬件代码下载到开发板上和CNA卡或者是磁盘阵列、FCoE交换机相连,进行了详细的分析和测试,通过Chipscope测试工具以及用户界面得到的测试结果满足了监控卡的设计要求。
[Abstract]:With the rapid development of science and technology, information, Technologies such as data processing and the internet are gradually integrated into people's daily work and life. The increasing demand for the speed of data processing has promoted the rapid development of data centers. The common networks in data centers include:---. The original area network (LAN), the storage network (San), etc. However, there are some shortcomings between the two, and the FCoE technology that combines the two is produced. For the FCoE technology, there are converged network adapters and switches, disk arrays, which can handle FCoE. With the wide application of these devices, the information exchange between networks and devices based on FCoE becomes more and more complex, and the performance of these networks and devices is also becoming more and more demanding. Moreover, the data communication of these devices is not transparent. In order to understand the communication situation of the equipment in a timely manner and avoid unnecessary time and economic losses, At this time, we need to be able to monitor these devices in real time. And the research of monitoring and testing equipment for FCoE network has certain economic significance. The main hardware of this paper is to write the data captured from 10G Ethernet link to host memory through PCI Epress 2.0 bus in real time. Used to display captured data on the host interface such as data type, total amount of data, rate of receiving data, etc. At the same time, the user can control the bottom hardware to trigger and filter the received frame by setting the trigger condition and filtering rules. In this way, the user can extract the needed frames and discard the unnecessary frame data, which can save time and improve the efficiency. The implementation of this monitoring card is based on FPGA. This paper introduces the optical fiber channel protocol, Gigabit Ethernet FCoE protocol and PCI Express bus technology, and puts forward the overall design scheme of the monitoring card by analyzing the functional requirements of the monitoring card. The two parts of FCoE interface and DMA controller in the design are introduced in detail, and the two modules are simulated by Modelsim simulation tools, after the functional simulation meets the design requirements, the two modules are tested jointly with the software. The hardware code is downloaded to the development board by the ISE tool and connected to the CNA card or the disk array FCoE switch. It is analyzed and tested in detail. The test results obtained through the Chipscope test tool and the user interface meet the design requirements of the monitoring card.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN929.11

【参考文献】