基于FPGA的IDEA加密算法的硬件实现

发布时间：2018-02-23 20:34

本文关键词： FPGA IDEA算法对称密码算法分组密码　出处：《山东大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着通信与计算机技术的飞速发展,信息的存储方式及传输方式发生了巨大的变化,越来越多的信息以数字化存在并由计算机通过网络来传递,信息的安全问题引起了人们极大的重视。密码算法成为信息安全问题的核心,算法的整体安全性也日益成为研究信息安全问题的关键。信息的快速发展推动了密码技术的发展,加密算法层出不穷。对称密码算法成为当前密码技术研究领域中的重要内容之一,与其他密码技术相比其保护数据在存储与传输过程的安全性是无可替代的。AES算法的诞生使得分组密码算法重新吸引了人们的眼球,登上了密码研究的“大舞台”。本文研究的主要课题就是围绕分组密码体制中的重要算法-IDEA加密算法进行探讨与分析。本文采用FPGA技术对一种对称密码体制即IDEA算法的加、解密模块进行了完整设计。首先对IDEA算法进行总体的学习与了解,基于此算法的基本工作原理对其加密、解密两个过程分别进行了详细的分析。根据IDEA加、解密算法的流程,采用8级流水线技术及自上而下的设计方法将该密码芯片分模块进行设计并仿真。其中,密钥生成模块负责将原始密钥转化为算法所需要的子密钥并进行存储操作；控制模块是根据状态的变化产生相应的控制信号；运算模块主要实现轮结构,完成各种迭代运算,同时解决了IDEA算法中一些复杂的运算的硬件电路的实现问题。最后将各个模块整合到一起进行仿真综合及验证给出系统的RTL级电路图、综合报告等。结果表明,该算法能够准确的在FPGA芯片上以1.4Gbps的速度实现加密及解密运算,证明了IDEA硬件的可行性。
[Abstract]:With the rapid development of communication and computer technology, great changes have taken place in the storage and transmission of information. More and more information exists in digital form and is transmitted by computer through network. The problem of information security has aroused great attention. Cryptographic algorithms have become the core of information security problems, and the overall security of algorithms has become the key to the study of information security. The rapid development of information has promoted the development of cryptography technology. The algorithm of symmetric cryptography has become one of the most important contents in the field of cryptography. Compared with other cryptographic techniques, the security of data protection in the process of storage and transmission is irreplaceable. The birth of the. AES algorithm makes the block cipher algorithm attract people's attention again. The main research topic of this paper is to discuss and analyze the important algorithm in block cipher system-idea encryption algorithm. In this paper, we adopt FPGA technology to add a symmetric cipher system, that is, IDEA algorithm. The decryption module is designed completely. Firstly, the IDEA algorithm is studied and understood. Based on the basic working principle of this algorithm, the two processes of encryption and decryption are analyzed in detail. According to the flow of IDEA encryption and decryption algorithm, The cipher chip is designed and simulated by the 8-level pipeline technology and top-down design method, in which the key generation module is responsible for converting the original key into the sub-key needed by the algorithm and storing it. The control module produces the corresponding control signal according to the change of the state, and the operation module mainly realizes the wheel structure and completes various iterative operations. At the same time, the problem of hardware circuit realization of some complex arithmetic in IDEA algorithm is solved. Finally, the various modules are integrated together for simulation and synthesis, and the RTL circuit diagram and synthesis report of the system are given. The results show that, The algorithm can accurately implement encryption and decryption operation at 1.4 Gbps on FPGA chip, which proves the feasibility of IDEA hardware.
【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791;TN918.4

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