基于FPGA的AES算法研究与应用

发布时间：2018-05-07 02:05

  本文选题：AES + 序列密码　； 参考：《黑龙江大学》2015年硕士论文

【摘要】：2013年爱德华斯诺登棱镜事件披露了美国国安局的监听丑闻,引起了世界的轰动。人类信息的安全更加得到了重视,数据加密系统的形成也是在此情况下产生和发展起来的。加密算法的研究成为了一种前所未有的挑战。2002年起,美国公布了最新的高级加密标准AES,它的出现得到了广泛的推广与应用,因此研究AES算法加密是有很大的前景和价值。本文主要设计了一种基于FPGA的AES算法的加密方案,在硬件开发环境FPGA上实现数据的加密,该系统实现了数据的安全、无误传输。本论文首先概述了AES算法的中所涉及的数学基础知识及AES算法的原理,其次主要解析了AES加密算法的整体结构,对算法中的各子模块进行了分析,用Verilog语言来描述算法的硬件实现。与此同时给出了各个子模块的原理图及其仿真效果。本文在第三章中设计了基于FPGA的两种加密算法,它们分别是分组密码AES算法和序列密码A5/1算法,加密算法的选取直接影响到整个加密系统的优良,所以通过文献的查阅,采用对比的方法选择最优算法。本章节还对AES和A5/1两种算法在进行大数据加密时吞吐量、资源占用率、功耗等进行对比,最后选择大数据加密更有优势的加密算法。本设计的难点在于采用FPGA硬件实现AES算法,以保护初始密钥不被攻破和泄漏。同时,在AES算法与A5/1算法的比较中需要进行大量数据的采集,在采集前需要加入一个FIFO缓存模块,在此模块上要准确控制时钟的输入才能保证数据正确传输。本文全部采用FPGA硬件平台实现数据加密,硬件加密具有速度快速,安全性高的优点,是密码学应用的趋势。
[Abstract]:The Edward Snowden Prism affair in 2013, which revealed the NSA surveillance scandal, caused a world sensation. More attention has been paid to the security of human information, and the formation of data encryption system is also produced and developed in this situation. The research of encryption algorithm has become an unprecedented challenge. Since 2002, the United States has published the latest advanced encryption standard AESs, which has been widely promoted and applied. Therefore, the research of AES encryption algorithm has great prospect and value. In this paper, an encryption scheme of AES algorithm based on FPGA is designed, which can encrypt the data on the hardware development environment FPGA. The system realizes the security and accurate transmission of the data. In this paper, the basic knowledge of AES algorithm and the principle of AES algorithm are summarized. Secondly, the whole structure of AES encryption algorithm is analyzed, and the sub-modules of the algorithm are analyzed. Verilog language is used to describe the hardware implementation of the algorithm. At the same time, the schematic diagram of each sub-module and its simulation effect are given. In the third chapter, we design two encryption algorithms based on FPGA, they are block cipher AES algorithm and sequence cipher A5 / 1 algorithm. The selection of encryption algorithm directly affects the quality of the whole encryption system. The optimal algorithm is chosen by contrast method. This chapter also compares the throughput, resource occupancy and power consumption of AES and A5 / 1 algorithms in big data encryption. The difficulty of this design is to use FPGA hardware to implement AES algorithm to protect the initial key from breaking and leaking. At the same time, in the comparison between AES algorithm and A5 / 1 algorithm, a large amount of data need to be collected, and a FIFO buffer module should be added before the acquisition. In this module, the clock input must be controlled accurately in order to ensure the correct transmission of data. This paper uses FPGA hardware platform to realize data encryption. Hardware encryption has the advantages of fast speed and high security. It is the trend of cryptography application.
【学位授予单位】：黑龙江大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN918.4
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本文编号：1854902