小型化超宽带冲激雷达收发系统关键技术研究与实现
发布时间:2018-06-02 23:11
本文选题:冲激雷达 + 窄脉冲 ; 参考:《电子科技大学》2014年硕士论文
【摘要】:超宽带冲激雷达是一种通过发射极窄的脉冲信号进行目标探测、定位和成像的新型雷达,它具有良好的穿透性能、极高的距离分辨率和超低的功耗等优点。可以应用于地质探测、室内定位,反隐身技术、穿墙反恐、丛林探测、生命救援、机场安监系统等各种民用和军事领域。本文围绕超宽带冲激雷达收发系统的关键技术,主要开展了以下几个方面的工作:(1)介绍了超宽带冲激雷达的历史、发展现状、技术优势和研究意义。阐述了超宽带冲激雷达的基本理论,包括冲激雷达系雷达方程和冲激雷达发射机接收机的关键技术理论等。(2)分别基于雪崩三极管和阶跃恢复二极管理论,设计并制作了两款超宽带窄脉冲源。从原理上分析了影响脉冲幅度、宽度的各个因素。制作的雪崩脉冲源最大幅度为3V,最小脉宽约为1ns,阶跃脉冲源最小脉宽为350ps,幅度最大为950mV。结果表明雪崩技术可以得到更大幅度的脉冲,而阶跃技术得到的脉冲信号脉宽更小。(3)基于放大器的负反馈理论,通过在低噪放晶体管的源极上添加电容以弥补高频增益。利用ADS软件快速优化输入输出端口的匹配阻抗,同时选择合适的反馈电阻,和附加优化目标,使端口阻抗达到优化目标要求的值。避免了在斯密斯圆图上寻找最佳匹配点的繁琐步骤。基于此,仿真并制作了带宽在0.1~1GHz,增益为38dB,输入输出端口S参数小于-10及噪声系数低于2的超宽带放大器。(4)在等效采样理论的基础上,通过FPGA产生10个频率为200MHz的时钟信号,该时钟信号经过低抖动延时芯片CDCF5801延时52ps(等效采样率20GS/S)后送给模数转换器MAX1121作为采样时钟。经过192次延时采样,一个完整的回波信号被采集到FPGA内部的缓存FIFO中,采集的数据经过BLOCKRAM的数据重组,得到正确的波形数据顺序,最后由FPGA控制固态存储器AT45DB161D把数据烧写到其内部的存储单元中,需要后端信号处理和分析时,再由FPGA读出并经过串口MAX232传输到PC机。该电路以较低的成本在以FR-4为基板的四层板上实现了超宽带冲激雷达的数据采集,避免了昂贵的高速ADC的购买。兼顾系统性能的同时很好的控制了成本。
[Abstract]:Ultra-wideband impulse radar is a new type of radar for target detection, location and imaging through very narrow pulse signals. It has the advantages of good penetration, high range resolution and ultra-low power consumption. Can be used in geological exploration, indoor positioning, anti-stealth technology, anti-wall anti-terrorist, jungle exploration, life rescue, airport safety monitoring system and other civil and military fields. Focusing on the key technology of UWB impulse radar transceiver system, this paper mainly introduces the history, development status, technical advantages and research significance of UWB impulse radar in the following aspects: 1. The basic theory of ultra-wideband impulse radar, including the radar equation of impulse radar system and the key technology theory of receiver of impulse radar transmitter, etc., based on the theory of avalanche transistor and step recovery diode, respectively. Two UWB narrow pulse sources are designed and fabricated. The influence factors of pulse amplitude and width are analyzed in principle. The maximum amplitude of avalanche pulse source is 3V, the minimum pulse width is about 1ns, the minimum pulse width of step pulse source is 350psand the maximum amplitude is 950mV. The results show that the avalanche technique can obtain a larger pulse, while the pulse width obtained by the step technique is smaller. Based on the negative feedback theory of the amplifier, the capacitor is added to the source pole of the low noise amplifier transistor to compensate for the high frequency gain. The matching impedance of the input and output ports is quickly optimized by using ADS software. At the same time, the appropriate feedback resistor is selected, and the additional optimization target is added to make the port impedance reach the value required by the optimization goal. The complicated steps of finding the best matching point on the Smith circle are avoided. Based on this, an UWB amplifier with a bandwidth of 0.1 GHz, a gain of 38 dB, an input and output port S parameter of less than -10 and a noise coefficient of less than 2 is simulated and fabricated. On the basis of equivalent sampling theory, 10 clock signals with 200MHz frequency are generated by FPGA. The clock signal is sent to the A / D converter MAX1121 as the sampling clock after the delay of 52 pss (equivalent sampling rate 20 GS / S) of the low jitter delay chip CDCF5801. After 192 time delay sampling, a complete echo signal was collected into the buffer FIFO of FPGA, and the collected data was reorganized by BLOCKRAM to obtain the correct waveform data order. Finally, the solid state memory (AT45DB161D) is controlled by FPGA to burn the data into its internal memory cell. When the back-end signal is processed and analyzed, the data is read out by FPGA and transmitted to PC through serial port MAX232. The circuit realizes the data acquisition of UWB impulse radar on a four-layer board based on FR-4 at lower cost, thus avoiding the purchase of expensive high-speed ADC. At the same time, the system performance is well controlled.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN958
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