可重构的直接射频采样接收机技术研究

发布时间：2018-06-13 09:20

  本文选题：可重构接收机 + 射频采样　； 参考：《电子科技大学》2014年硕士论文

【摘要】：随着现代电子通信集成技术的飞速发展,可重构雷达数字接收机已成为国内外学者研究的热点。可重构直接射频采样数字接收机能够在不做硬件变动的前提下通过调整自身参数来实现不同频段、带宽信号的接收。这样不仅硬件体积得到大大减小,同时还可以根据接收信号的不同进行实时调整,具有很强的灵活性和可扩展性。本文针对可重构直接射频采样接收机的结构进行了分析,从工作原理和理论推导等方面出发介绍了可重构直接射频采样接收机与传统接收机的不同之处。然后提出一种可重构射频采样接收机的实施方案,通过Matlab对系统做仿真分析并结合FPGA实现验证接收机结构的合理性以及可实现性。本文研究的主要内容包括:1、针对可重构直接射频采样接收机的结构进行理论分析与介绍,包括可重构接收机的工作原理以及实现中所涉及到的相关理论基础;2、围绕可重构射频采样接收机结构中的关键技术进行研究,推导了射频脉冲采样过程中脉冲串的脉宽以及采样时钟的抖动对接收信号的影响,并结合Matlab仿真,验证了时钟源的不稳定对系统信噪比的影响;3、从射频采样时钟抖动引起系统信噪比的变化出发,建立了去抖动噪声模型。将去噪过程分两个步骤,首先从模拟端引入校准信号,通过校准信号的相位变化反推射频信号的抖动相位从而对抖动噪声进行抑制,其次研究基带信号的去噪算法从而进一步提高接收机的信噪比;4、提出一种基于双波段信号接收的可重构接收机设计方案,对ADC采样后的信号作数字混频下变频以及CIC级联滤波器、HB级联滤波器进行抽取滤波和自适应滤波等过程进行了Matlab仿真,验证了方案的合理性;5、将设计方案在FPGA中加以实现,并将Modelsim和Matlab综合起来仿真结果证明方案的可行性。
[Abstract]:With the rapid development of modern electronic communication integration technology, the reconfigurable radar digital receiver has become a hot research topic of scholars at home and abroad. The reconfigurable direct radio frequency sampling digital receiver can realize the reception of different frequency band and bandwidth signal by adjusting its own parameters without changing the hardware. In this way, not only the hardware volume is greatly reduced, but also the received signal can be adjusted in real time, which is flexible and extensible. In this paper, the structure of the reconfigurable direct radio frequency sampling receiver is analyzed, and the differences between the reconfigurable direct radio frequency sampling receiver and the traditional receiver are introduced from the aspects of working principle and theoretical derivation. Then a scheme of reconfigurable RF sampling receiver is proposed. The system is simulated and analyzed by Matlab and the rationality and realizability of the receiver structure are verified by FPGA. The main contents of this paper include: 1. The structure of the reconfigurable direct radio frequency sampling receiver is analyzed and introduced theoretically. Including the working principle of the reconfigurable receiver and the related theoretical foundation involved in the implementation, the key technologies in the structure of the reconfigurable RF sampling receiver are studied. The influence of pulse width of the pulse string and the jitter of the sampling clock on the received signal in the process of RF pulse sampling is deduced, and combined with Matlab simulation, The influence of clock source instability on system SNR is verified. Based on the variation of SNR caused by RF sampling clock jitter, a de-jitter noise model is established. The de-noising process is divided into two steps: first, the calibration signal is introduced from the analog end, and the jitter phase of the RF signal is pushed back by the phase change of the calibration signal to suppress the jitter noise. Secondly, the de-noising algorithm of baseband signal is studied to further improve the signal-to-noise ratio (SNR) of receiver. A design scheme of reconfigurable receiver based on dual-band signal reception is proposed. The process of decimation filter and adaptive filter are simulated by Matlab. The rationality of the scheme is verified by Matlab simulation, and the design scheme is implemented in FPGA. The simulation results of Modelsim and Matlab show the feasibility of the scheme.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN957.5

【参考文献】

中国硕士学位论文全文数据库 前1条

1 白光宇;射频可重构滤波器设计[D];北京交通大学;2010年

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本文编号：2013521