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基于FPGA的千兆网通信协议栈实现技术研究

发布时间:2018-08-19 13:39
【摘要】:随着通信技术的高速发展,通信设备在接口设计上,已越来越多的选择可承载大数据流量业务的高速接口进行设计,如GMII、SGMII、XAUI、RapidIO等。针对此类应用,除了满足硬件设计需求,还需在设计中引入标准的通信传输协议,采用通用模块化设计,使软硬件模块具有较强的通用性和可移植性。本文项目背景如下:开发一款基于ATCA(Advanced Telecom Computing Architecture,即先进的电信计算平台)架构的测试仪器专用通信适配板,通信适配板与ATCA机箱背板通过千兆网接口,与被测通信设备通过专用接口板接口。本论文针对上述需求,以基于嵌入式系统的千兆网UDP/IP协议栈实现技术为主要的研究对象,在深入分析标准UDP/IP协议栈原理的基础上,对用FPGA+DSP作为硬件平台实现千兆网UDP/IP协议栈进行了详尽的讨论和研究,主要内容为:1.研究标准UDP/IP协议栈,分析标准UDP/IP协议栈的分层协议功能,并针对实际应用和硬件自身特点设计出相应的通信协议栈。2.研究嵌入式技术在通信领域的应用,对嵌入式技术的特点,技术发展趋势以及高性能的FPGA、DSP在通信领域的发展进行了详细的讨论,并结合实际需求提出了嵌入式以太网的总体解决方案。3.设计并实现以FPGA为核心,基于FPGA+DSP架构为硬件平台的UDP/IP通信协议栈,在设计上采用FPGA作为通信的主要通道,DSP协助其进行部分协议的分析和处理,通过对功能区域进行明确划分,采用模块化的设计思想进行实现。4.完成设计后对设计结果进行仿真验证和硬件功能测试,并对验证结果进行分析,分析结果表明,本方案在链路层设计上符合IEEE802.3-2008规范,提供了1000Mb的带宽,同时完全兼容10M/100M以太网,提供了全双工的数据通道,实现了标准UDP/IP协议与通信设备专用协议之间的转换,且研究成果已在其它项目中进行推广使用。
[Abstract]:With the rapid development of communication technology, more and more high speed interfaces, such as GMII / SGMIIXAUI / RapidIO, which can carry big data traffic service, have been chosen in the interface design of communication equipment. For this kind of application, in addition to meeting the requirement of hardware design, it is also necessary to introduce standard communication transmission protocol in the design, and adopt general modular design, which makes the hardware and software modules have strong generality and portability. The background of this paper is as follows: develop a special communication adaptor board based on ATCA (Advanced Telecom Computing Architecture, (advanced telecommunication computing platform) architecture, communication adapter board and ATCA crate backplane interface through gigabit network. Interface with the tested communication equipment through a special interface board. In order to meet the above requirements, this paper takes the implementation technology of gigabit network UDP/IP protocol stack based on embedded system as the main research object, on the basis of deeply analyzing the principle of standard UDP/IP protocol stack. The implementation of gigabit network UDP/IP protocol stack using FPGA DSP as hardware platform is discussed and studied in detail. The main content is: 1: 1. This paper studies the standard UDP/IP protocol stack, analyzes the hierarchical protocol function of the standard UDP/IP protocol stack, and designs the corresponding communication protocol stack .2. according to the actual application and the characteristics of the hardware itself. The application of embedded technology in the field of communication is studied. The characteristics of embedded technology, the trend of technology development and the development of high performance FPGA DSP in communication field are discussed in detail. The overall solution of embedded Ethernet. 3. This paper designs and implements a UDP/IP communication protocol stack based on FPGA and FPGA DSP architecture as hardware platform. In the design, FPGA is used as the main channel of communication to help it analyze and process some protocols, and the functional areas are clearly divided. Using modular design ideas to achieve. 4. After the design is finished, the design results are verified by simulation and hardware function test. The analysis results show that the design of the link layer conforms to the IEEE802.3-2008 specification, provides the bandwidth of 1000Mb, and is fully compatible with 10M/100M Ethernet at the same time. The full-duplex data channel is provided and the conversion between the standard UDP/IP protocol and the special protocol for communication equipment is realized. The research results have been popularized and used in other projects.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN915.04

【参考文献】

相关期刊论文 前2条

1 王力生;梅岩;曹南洋;;轻量级嵌入式TCP/IP协议栈的设计[J];计算机工程;2007年02期

2 李向涛,仵国锋;FPGA同步设计技术[J];无线通信技术;2003年03期



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