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基于FPGA的Camera Link视频信号处理技术的研究

发布时间:2018-08-25 20:33
【摘要】:由于Camera Link视频信号具有高分辨率、高传输速度、图像处理灵活、通信协议简单、传输接口结构易于实现等优势,因此近年来在民用领域如安防监控、视觉遥感、多媒体处理等方面具有大量的市场需求。本论文以FPGA为核心处理器,研制了一套能够采集并处理Camera Link视频信号,并支持多种视频接口显示的处理系统。 本文首先对系统的功能需求进行了分析,在此基础上提出以FPGA为核心器件的Camera Link视频信号处理系统的设计方案。方案中系统采集Camera Link相机的图像数据,将数据的色彩空间由Bayer转换为RGB或YUV,处理后的数据存储到SDRAM中,并分别用ADV7343和ADV7123视频编码芯片完成复合视频接口输出和VGA接口输出。接着设计硬件电路的原理图和PCB板,并对系统硬件电路平台进行了搭建与调试。然后重点研究了Camera Link相机功能模式,通过串口通信完成对相机工作方式的配置,并对视频信号的处理进行了初步探讨。最后编写视频处理系统软件,对CameraLink视频信号进行采集、处理并存储,用FPGA普通I/O口模拟IIC总线对视频编码芯片进行配置,将视频信号以多种格式输出显示。
[Abstract]:Because Camera Link video signal has the advantages of high resolution, high transmission speed, flexible image processing, simple communication protocol and easy implementation of transmission interface, it has been widely used in the field of civil security monitoring and visual remote sensing in recent years. Multimedia processing and other aspects have a lot of market demand. In this paper, FPGA is used as the core processor to develop a processing system which can collect and process Camera Link video signals and support multiple video interfaces. Based on the analysis of the functional requirements of the system, a design scheme of Camera Link video signal processing system based on FPGA is proposed in this paper. In the scheme, the image data of Camera Link camera is collected, and the color space of the data is converted from Bayer to RGB or YUV, and stored in SDRAM. The composite video interface output and VGA interface output are completed by ADV7343 and ADV7123 video coding chip respectively. Then the schematic diagram and PCB board of the hardware circuit are designed, and the hardware circuit platform of the system is built and debugged. Then the function mode of Camera Link camera is studied emphatically, the configuration of camera working mode is accomplished by serial port communication, and the processing of video signal is discussed preliminarily. Finally, the software of video processing system is written, the CameraLink video signal is collected, processed and stored, and the video coding chip is configured with FPGA I / O port analog IIC bus, and the video signal is output and displayed in various formats.
【学位授予单位】:南京理工大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN911.7

【参考文献】

相关期刊论文 前1条

1 王经典;杨爱良;;一种BT.656到XGA视频格式转换结构的FPGA实现[J];航空电子技术;2010年03期



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