当前位置:主页 > 科技论文 > 网络通信论文 >

基于FPGA的QPSK调制解调的设计与实现

发布时间:2018-11-19 19:51
【摘要】:软件无线电是当今无线通信领域的一项具有前沿性的技术,它的基本思想是从模块化、标准化和通用化的角度出发,追求无线通信系统的全频段、多模式、和可重构的操作方式。在符合软件无线电的通信系统中,用户能够根据自己的需求定义该硬件平台的各种各样的基本功能。从而使硬件电路的设计如同软件设计一样方便,也得软件无线电广泛的应用于通信领域的各方面。QPSK调制方式是数字调制方式的一种,因其频带利用率高,抗干扰能力强,传输速率快等特点广泛应用于现代数字通信系统中。现场可编程门阵列(Field Programmable Array,FPGA)用于数字电路设计时,用硬件电路描述语言进行数字电路设计,具有开发过程投资小、开发周期短、开发智能化和可重构等特点。由此可见,用FPGA来实现QPSK调制解调符合软件无线电的思想,所以用FPGA来实现QPSK调制解调具有重要的意义。本文首先给出了基于FPGA的QPSK调制解调设计与实现的背景与意义,即在软件无线电的思想背景下用FPGA设计QPSK调制解调系统。分析了QPSK调制解调技术的研究现状、FPGA的发展和用FPGA来实现QPSK调制解调的实际意义。对QPSK调制解调的原理与系统设计框图进行了详细的说明,为文中具体电路的设计提供了坚实的理论基础。调制端由向上混频器、成型滤波器、数控振荡器和加法器组成,本文重点对成型滤波器和数控振荡器进行了设计和实现,通过采用升余弦滚降滤波器来对基带信号进行滤波成型处理,解决了基带信号频带宽和码间串扰的问题;通过查表法来产生两路正交的正弦信号,解决了因载波正交性不好而导致的QPSK星座图歧变问题。解调电路由向下混频器、匹配滤波器、载波同步模块、位同步模块和取样判决模块等组成。本文重点对载波同步模块和位同步模块进行了设计和实现,载波同步采用Costas锁相环来实现,位同步采用Gardner锁相环来实现。Costas环中的鉴相器,本文对传统的乘法器作为鉴相器做了一定的改进,改用差分鉴相器来实现,从而一定程度上提高了鉴相器的灵敏度,又通过用环路滤波器的输出来控制环路中的数控振荡器的频率控制字,来实现环路的稳定性和准确输出,因此Costas锁相环来实现载波同步提高了解调端载波恢复的准确度。Gardner锁相环中的插值滤波器,本文对传统的滤波器结构做了一定的改进而采用并行工作的立方内插滤波器,提高了数据处理速度;而Gardner锁相环本身的特性独立于载波同步的特性,所以提高了位同步的性能。在MATLAB建模仿真验证各个设计的正确性的基础上,借助Quartus II平台,用硬件电路描述语言Verilog来实现了QPSK调制解调系统中的各个设计模块,并将最后将产生的下载的文件下载到Altera公司的Cyclone II系列的EP2C35F672C6NX芯片上完成了QPSK调制解调的FPGA实现。在这过程中还用Modelsim对编译后的Verilog文件进行功能仿真,分析设计中各个模块的仿真波形,验证Verilog程序设计的正确性。最后通过对解调出的信号和调制端发射的信号,在示波器是进行显示对比,验证了论文中QPSK调制解调电路设计和实现的正确性。本文在分析了QPSK调制解调技术原理的基础上,对调制端和解调端的各个模块包括成型滤波器、数控振荡器、载波同步、位同步等模块进行了详细的MATLAB建模仿真分析和FPGA实现,实现了发送信号经发送端QPSK调制发射后,经接收端解调后得到了正确的发送数据,达到了预期的效果。本课题是借助之前实习公司的项目完成,由于篇幅和工作量的原因,本课题只涉及其中的调制解调部分。
[Abstract]:Software radio is a front-edge technology in the field of wireless communication, and its basic idea is to pursue the full-band, multi-mode and reconfigurable operation of the wireless communication system from the perspective of modularization, standardization and generalization. In a software radio-compliant communication system, a user is able to define a wide variety of basic functions of the hardware platform in accordance with their needs. so that the design of the hardware circuit is as convenient as the software design, and the software radio is widely applied to all aspects of the communication field. The QPSK modulation scheme is a kind of digital modulation method, which is widely used in modern digital communication system because of its high frequency band utilization rate, strong anti-interference ability and high transmission rate. The field programmable gate array (FPGA) is used in the digital circuit design. The hardware circuit description language is used to design the digital circuit. The field programmable gate array (FPGA) has the characteristics of small development process investment, short development cycle, intelligent and reconfigurable development. It can be seen that the implementation of QPSK modulation and demodulation with FPGA is in accordance with the idea of software radio, so it is of great significance to implement QPSK modulation and demodulation with FPGA. This paper first gives the background and significance of the design and implementation of QPSK modulation and demodulation based on FPGA, that is, the QPSK modulation and demodulation system is designed with FPGA in the background of software radio. The research status of QPSK modulation and demodulation technology, the development of FPGA and the practical significance of QPSK modulation and demodulation are analyzed. The principle and system design block diagram of QPSK modulation and demodulation are described in detail, which provides a solid theoretical basis for the design of the circuit. the modulation end is composed of an upward mixer, a shaping filter, a numerical control oscillator and an adder, the problem of the band width of the baseband signal and the crosstalk of the codes is solved, two orthogonal sine signals are generated by a look-up table method, and the problem of the QPSK constellation problem caused by the bad carrier orthogonality is solved. The demodulation circuit is composed of a down mixer, a matched filter, a carrier synchronization module, a bit synchronization module and a sampling decision module. In this paper, the carrier synchronization module and the bit synchronization module are designed and implemented. The carrier synchronization is realized by a Costas phase-locked loop, and the bit synchronization is realized by a Gardner phase-locked loop. The phase detector in the Costas loop is modified by the traditional multiplier as the phase detector, and the differential phase detector is used to realize the phase detector, so that the sensitivity of the phase detector is improved to a certain extent, and the frequency control word of the numerical control oscillator in the loop is controlled by the output of the loop filter, so as to realize the stability and the accurate output of the loop, so the Costas phase-locked loop can realize the carrier synchronization and improve the accuracy of the carrier recovery of the modulation end. The interpolation filter in the Gardner phase-locked loop has improved the performance of bit synchronization by making a certain improvement on the traditional filter structure and adopting a parallel-working cubic interpolation filter to improve the data processing speed; and the characteristic of the Gardner phase-locked loop itself is independent of the carrier-synchronous characteristic, so the bit-synchronization performance is improved. On the basis of MATLAB modeling and simulation to verify the correctness of each design, using the Quartus II platform, the hardware circuit description language Verilog is used to implement the various design modules in the QPSK modulation and demodulation system. and the finally generated downloaded file is downloaded to the EP2C35F672C6NX chip of the Cyclin II series of Altera, and the FPGA implementation of the QPSK modulation and demodulation is completed. In this process, the compiled Verilog file is simulated by Modelsim, and the simulation waveform of each module in the design is analyzed, and the correctness of Verilog programming is verified. and finally, the signal transmitted by the demodulated signal and the modulation end is compared, and the correctness of the circuit design and the implementation of the QPSK modulation and demodulation circuit in the paper is verified. In this paper, based on the analysis of the principle of QPSK modulation and demodulation, the modules including the shaping filter, the numerical control oscillator, the carrier synchronization, the bit synchronization and the like of the modulation end and the demodulation terminal are described in detail with the MATLAB modeling and simulation analysis and the FPGA implementation. and after the transmission signal is modulated and transmitted through the transmission end QPSK, the correct transmission data is obtained after being demodulated by the receiving end, and the expected effect is achieved. The subject is completed by the project of the former practice company, and the subject only relates to the modulation and demodulation part of the subject due to the length and the workload.
【学位授予单位】:成都理工大学
【学位级别】:硕士
【学位授予年份】:2015
【分类号】:TN791;TN915.05

【参考文献】

相关硕士学位论文 前1条

1 隋德良;QPSK中频全数字解调器的设计与FPGA实现[D];南京理工大学;2010年



本文编号:2343263

资料下载
论文发表

本文链接:https://www.wllwen.com/kejilunwen/wltx/2343263.html


Copyright(c)文论论文网All Rights Reserved | 网站地图 |

版权申明:资料由用户c14e3***提供,本站仅收录摘要或目录,作者需要删除请E-mail邮箱bigeng88@qq.com