基于三值光学计算机的并行快速Fourier算法实现
发布时间:2018-01-12 21:28
本文关键词:基于三值光学计算机的并行快速Fourier算法实现 出处:《中国科学:信息科学》2017年07期 论文类型:期刊论文
更多相关文章: 三值光学计算机 快速Fourier变换 并行计算 MSD加法器 嵌入式设备
【摘要】:快速Fourier变换(FFT)是信号处理领域应用十分广泛的算法,在高速、实时的应用环境中常用硬件并行实现的方法来加快FFT的运算速度,但在一些特定领域如在空间受限、对能耗及散热具有较高要求的航空航天设备中,传统的电子方法将受到很大的局限,而三值光学计算机以其能耗低、数据位数众多的优点使得它可能具有广泛的应用前景.针对这种现状,本文研究了采用三值光学计算机来实现快速Fourier变换的设计方案和方法.通过对传统基2、基4和基8时域抽取快速Fourier变换运算过程的分析,利用三值光学计算机数据位数众多和数据位数易扩展的特点设计了多个并行度更高的快速Fourier变换算法,给出了详细的算法实现流程并进行了各算法间的对比,分析了实现方案所需的时钟周期和硬件资源,模拟验证了该实现方案的正确性.相比于传统基于现场可编程门阵列的并行实现方法,这种在三值光学计算机上实现的快速Fourier变换运算功耗更低、所需时钟周期数更少,这为在嵌入式设备中高速低功耗地实现快速Fourier变换提供了新的解决思路.
[Abstract]:Fast Fourier transform (FFT) is a widely used algorithm in the field of signal processing. In high speed and real time application environment, the hardware parallel implementation method is commonly used to speed up the operation speed of FFT. However, in some special fields, such as limited space, high requirements for energy consumption and heat dissipation, the traditional electronic methods will be greatly limited, while the ternary optical computer with its low energy consumption. The advantages of a large number of data bits make it possible to have a wide range of application prospects. In this paper, the design scheme and method of fast Fourier transform using ternary optical computer are studied. The analysis of the fast Fourier transform operation in the time domain decimation of base 4 and base 8. Taking advantage of the large number of data bits in ternary optical computers and the easy expansion of data bits, several fast Fourier transform algorithms with higher parallelism are designed. The detailed implementation flow of the algorithm is given, and the comparison among the algorithms is carried out, and the clock cycle and hardware resources required for the implementation are analyzed. Compared with the traditional parallel implementation method based on the field programmable gate array, the fast Fourier transform implemented on the ternary optical computer has lower power consumption. The number of clock cycles required is even less, which provides a new solution for fast Fourier conversion in embedded devices with high speed and low power consumption.
【作者单位】: 上海大学计算机工程与科学学院;中国科学院上海高等研究院;毫米波遥感技术国家级重点实验室;
【基金】:国家自然科学基金(批准号:61572305,61103054) 中国航天科工集团二院“自主”创新项目资助
【分类号】:TN911.7
【正文快照】: 1引言快速Fourier变换(FFT:fast Fourier transformation)[1]作为在数字信号处理领域的重要工具,在雷达信号分析、图像处理、语音分析等应用中被广泛使用.针对高速、实时的应用场合,目前常见的FFT硬件加速器采用基于流水线的单路径延时反馈结构[2]或者各级内蝶形变换并行处理
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