WSN射频收发芯片中低电压中频电路设计与实现

发布时间：2018-02-01 20:23

本文关键词： 无线传感器网络低电压中频电路复数滤波器限幅放大器　出处：《东南大学》2017年硕士论文　论文类型：学位论文

【摘要】：无线传感器网络(WSN),是由大量微型传感器节点通过无线通信的方式形成的一个多跳自组织网络系统。无线传感器节点一般由电池供电,为了延长节点的工作寿命,应尽可能降低节点工作电压,减小节点功耗,故低电压低功耗是无线传感器网络的关键技术之一。中频电路作为集成电路系统和WSN的重要组成部分,在射频收发芯片中起着抑制干扰信号和控制信号幅度等关键作用,为了促进无线传感器网络的大规模应用,研究应用于WSN的低电压低功耗中频电路具有重要意义。本文采用TSMC0.18μm RFCMOS工艺设计并实现了应用于WSN射频收发芯片中低电压中频电路,中频电路包含复数滤波器和限幅放大器两个模块。其中复数滤波器由有源复数滤波器与无源多相滤波器组合而成,这种组合解决了复数滤波器高镜像抑制与低功耗之间的矛盾。针对有源复数滤波器,本文提出了极点构造法简化了其设计流程,通过三个单极点复数滤波器的直接耦合构成三阶巴特沃斯有源复数滤波器。为了提高有源复数滤波器的线性度,降低其功耗,单极点复数滤波器的设计利用了源级负反馈、负阻等技术,同时通过恒跨导偏置电路减小滤波器参数随工艺角温度的影响。针对限幅放大器,本文设计了自偏置负载结构的放大单元和直流失调消除单元,实现了高增益和低功耗的单元电路,同时本文详细推导了直流失调反馈环路的滤波参数与增益之间的关系,指出了低中频输入信号将导致版图面积过大或功耗过高等问题,为了实现版图面积与功耗的折中,本文设计了带有多个直流失调反馈环路的限幅放大器结构。芯片测试结果表明,复数滤波器通带带宽为0.37～4.1MHz,输入1dB压缩点为-17.1dBm,中频频率处的增益为1.04dB,镜像抑制为38.34dB,邻道抑制为20.77dB,相隔信道抑制为37.49dB,工作电流为154μA。限幅放大器工作频率覆盖1～3MHz,最小输入信号幅度为-59dBm,工作电流为759μA。整个中频电路工作电压为IV,工作电流不超过1mA。
[Abstract]:Wireless sensor network (WSNN) is a multi-hop ad hoc network system formed by a large number of micro-sensor nodes through wireless communication. Wireless sensor nodes are generally powered by batteries. In order to prolong the working life of the node, the working voltage of the node should be reduced as much as possible and the power consumption of the node should be reduced. Therefore, low voltage and low power consumption is one of the key technologies in wireless sensor networks. Intermediate frequency circuit is an important part of integrated circuit system and WSN. In order to promote the large-scale application of wireless sensor networks, it plays a key role in suppressing interference signals and controlling the amplitude of signals in RF transceiver chips. It is of great significance to study the low voltage and low power if circuit used in WSN. The TSMC0.18 渭 m is used in this paper. The low voltage if circuit used in WSN RF transceiver chip is designed and implemented by RFCMOS process. If circuit includes two modules: complex filter and limiting amplifier. The complex filter is composed of active complex filter and passive polyphase filter. This combination solves the contradiction between high image suppression and low power consumption of complex filters. For active complex filters, a pole construction method is proposed to simplify the design process. The third order Butterworth active complex filter is constructed by the direct coupling of three single pole complex filters. In order to improve the linearity of the active complex filter and reduce its power consumption. The single pole complex filter is designed by using the techniques of source level negative feedback, negative resistance and constant transconductance bias circuit to reduce the influence of filter parameters on the temperature of the process angle. In this paper, a self-bias load structure amplifier unit and a DC offset cancellation unit are designed to achieve high gain and low power consumption of the cell circuit. At the same time, the relationship between filter parameters and gain of DC offset feedback loop is deduced in detail, and it is pointed out that low if input signal will lead to too large layout area or too high power consumption and so on. In order to achieve the tradeoff between layout area and power consumption, a limiting amplifier structure with multiple DC offset feedback loops is designed. The chip test results show that. The passband bandwidth of the complex filter is 0.37 ~ 4.1MHz, the input 1dB compression point is -17.1 dBm, the gain at the intermediate frequency is 1.04dB, and the mirror image suppression is 38.34dB. The adjacent channel suppression is 20.77 dB, the interval channel suppression is 37.49 dB, the operating current is 154 渭 A. The minimum input signal amplitude is -59dBm, the working current is 759 渭 A. the working voltage of the whole intermediate frequency circuit is IVand the working current is not more than 1 Ma.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP212.9;TN929.5

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