应用于宽带无线通信发射机中100MHz模拟基带电路的研究与设计

发布时间：2018-03-01 09:36

本文关键词： 宽带无线通信模拟基带信道选择滤波器可编程增益放大器直流失调　出处：《东南大学》2017年硕士论文　论文类型：学位论文

【摘要】：本文面向宽带无线通信发射机,设计了其中的模拟基带电路,该模拟基带电路主要包括三个关键模块,它们分别是信道选择滤波器、可编程增益放大器(PGA)和直流失调消除电路(DCOC)。本文从直接上变频发射机的架构出发,确定了模拟基带整体和三个关键模块的设计指标,并完成了信道选择滤波器、PGA和DCOC等关键模块的设计。本文设计的信道选择滤波器为六阶切比雪夫Active-RC低通滤波器,采用三个单位增益的Sallen-Key 二阶单元级联的方式实现,滤波器的截止频率可通过电容阵列进行调节。二阶单元中的运算放大器采用双输入对的全差分两级运算放大器,一对输入用于构成滤波器,另一对输入用于构成单位增益负反馈。运算放大器的第一级采用改进的共源共栅负载,以提高运算放大器闭环后的共模稳定性。本文的可编程增益放大器分为衰减级和放大级,衰减级采用π型电阻网络实现,对于放大级的实现,本文选择基于源极退化电阻可编程的PGA作为基本结构。考虑到传统的源极退化电阻可编程的PGA的线性度和增益之间的矛盾,本文将一种跨导增强技术应用于PGA放大级的核心电路,以提高PGA的增益和线性度。对于直流失调电压的问题,本文采用了低通负反馈的方式进行直流失调消除。负反馈通路中的低通滤波器采用一阶RC滤波器实现,其中的大电容通过米勒效应在片实现。DCOC的输出级为4个跨导单元,其中2个跨导单元流出动态电流,另外2个流入动态电流,这个电流在反馈电阻上产生电压用于抵消直流失调。考虑到版图对电路性能的影响,本文给出了版图设计的流程和基本原则,重点分析了版图设计的匹配原则,并根据上述原则完成了模拟基带电路的版图设计。该模拟基带电路采用TSMC0.13μm CMOS工艺实现,且已经通过后仿真验证。后仿真结果表明,模拟基带电路在电源电压1.2V下的功耗小于22mW,带宽可以在100MHz、130MHz和170MHz三个档位调节,可实现步长为1dB的增益步进调节,调节的范围为-18～30dB。可以看出,电路后仿真结果满足宽带系统对模拟基带电路的设计要求,可以应用于宽带无线通信发射机中。
[Abstract]:In this paper, the analog baseband circuit for broadband wireless communication transmitter is designed. The analog baseband circuit consists of three key modules, which are channel selection filters. Programmable gain Amplifier (PGA) and DC offset Elimination Circuit (DCOC). Based on the architecture of direct up-conversion transmitter, the design indexes of the whole analog baseband and three key modules are determined in this paper. The key modules of channel selection filter, such as PGA and DCOC, are designed. The channel selection filter designed in this paper is a sixth-order Chebyshev Active-RC low-pass filter, which is implemented by cascading Sallen-Key second-order units with three unit gains. The cutoff frequency of the filter can be adjusted by a capacitor array. The operational amplifier in the second order unit uses a fully differential two-stage operational amplifier with two input pairs, and a pair of inputs is used to form the filter. The other pair of inputs are used to form negative feedback of unit gain. The first stage of the operational amplifier adopts an improved common-gate load to improve the common-mode stability after the closed loop of the operational amplifier. The programmable gain amplifier in this paper is divided into attenuation stage and amplifying stage. The attenuation stage is realized by 蟺 type resistor network. For the realization of amplifier stage, a programmable PGA based on the source degenerate resistor is chosen as the basic structure. Considering the contradiction between the linearity and gain of the traditional source degenerate resistor programmable PGA, In this paper, a transconductance enhancement technique is applied to the core circuit of PGA amplifier to improve the gain and linearity of PGA. The low pass filter in the negative feedback path is realized by the first order RC filter. The output stage of the DCOC is 4 transconductance units, which are realized by Hans Muller effect. Two of the transconductors flow out of the dynamic current and the other two flow into the dynamic current, which generates a voltage on the feedback resistor to counteract the DC offset. This paper gives the flow and basic principles of layout design, analyzes the matching principle of layout design, and completes the layout design of analog baseband circuit according to the above principles. The analog baseband circuit is realized by TSMC0.13 渭 m CMOS process. The simulation results show that the power consumption of the analog baseband circuit is less than 22mW at 1.2V supply voltage, the bandwidth can be adjusted at 100MHz / 100MHz and 170MHz, and the gain step adjustment of 1dB can be realized. It can be seen that the simulation results after the circuit can meet the design requirements of the analog baseband circuit in the broadband system, and can be used in the broadband wireless communication transmitter.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN830;TN92

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