基于FPGA的数字下变频研究和实现

发布时间：2018-03-25 17:10

  本文选题：数字下变频　切入点：软件无线电　出处：《山东大学》2016年硕士论文

【摘要】：在当今国内无线通信系统中,数字接收机由于受到前端A／D转换器的采样速率、购买渠道和后端数字基带数据模块处理速度的限制,一般情况下会把从天馈系统接收到的射频信号先经过模拟正交混频转换成合适的低中频信号,然后在中频部分进行数字下变频处理,经过数据采集、数字正交混频、抽取、整形滤波等把中频信号转换为低速的零中频信号后,再送给后续的基带模块进行数字AGC、时钟同步、均衡、载波恢复、解调、译码等数据处理,这样可以解决由于器件本身采样速率和处理时钟的限制造成的后续设计困难,因此数字下变频的设计和实现在现代无线通信领域中具有十分重要的实用意义。当前无线通信设备中,高密度、高性能以及低功耗的FPGA芯片逐渐取代了一些价格昂贵的专用集成电路,采用FPGA电路设计可以利用通用的硬件设计平台,降低硬件电路设计的复杂度,在软件升级、单元互联、调试测试方面都有很大的优势。本论文在信号采样原理、数控振荡器、正交混频、数字滤波器等相关理论的基础上,分析研究了FPGA实现数字下变频技术的可行性,并在通用的硬件平台上得到验证。本课题的主要工作包括以下几点：第一、对数字下变频技术相关的基本理论作了详细的叙述,对专用DDC芯片和FPGA实现数字下变频进行比较,给出基于FPGA实现数字下变频的优势。第二、从硬件电路和软件两个方面详细介绍了数字下变频的设计与实现方法。硬件电路详细介绍了本课题的通用硬件平台,对各个电路模块进行了详细的原理说明；软件部分给出实现数字下变频的流程框图和其中关键模块设计方法。第三、通过FPGA芯片(Altera公司的Stratix Ⅳ系列)对数字下变频各个模块进行验证,给出测试和仿真结果。
[Abstract]:In the domestic wireless communication system nowadays, the digital receiver is limited by the sampling rate of the front-end A / D converter, the purchasing channel and the processing speed of the back-end digital baseband data module. In general, the RF signals received from the sky feed system will be converted into appropriate low intermediate frequency signals through analogue orthogonal mixing, and then digital down-conversion processing will be carried out in the intermediate frequency section. After data acquisition, digital orthogonal mixing and decimation, After converting the intermediate frequency signal into a low speed zero intermediate frequency signal, the shaping and filtering process is then sent to the subsequent baseband module for digital AGCs, clock synchronization, equalization, carrier recovery, demodulation, decoding and other data processing. In this way, the difficulty of subsequent design caused by the limitation of sampling rate and processing clock of the device itself can be solved. Therefore, the design and implementation of digital down-conversion is of great practical significance in the field of modern wireless communication. FPGA chips with high performance and low power consumption have gradually replaced some expensive ASIC. Using FPGA circuit design can make use of general hardware design platform, reduce the complexity of hardware circuit design, upgrade software, interconnect units. On the basis of the theory of signal sampling, numerical control oscillator, orthogonal mixing, digital filter and so on, the feasibility of realizing digital downconversion with FPGA is analyzed. The main work of this paper is as follows: first, the basic theory of digital down-conversion technology is described in detail, and the comparison between the dedicated DDC chip and the realization of digital down-conversion by FPGA is carried out. The advantages of digital down conversion based on FPGA are given. Secondly, the design and implementation of digital down conversion are introduced in detail from the aspects of hardware circuit and software. The hardware circuit introduces the general hardware platform of this subject in detail. The principle of each circuit module is explained in detail. The flow chart and the key module design method are given in the software part. Each module of digital down-conversion is verified by Stratix 鈪，

本文编号：1664071