高速串行信号的抖动分析研究

发布时间：2018-04-21 23:13

本文选题：串行信号 + 锁相环　；参考：《北京交通大学》2017年硕士论文

【摘要】：由于抖动的存在,在高速串行信号的传输过程中,整个系统的性能往往会受到很大影响,抖动已经成为制约高速数字系统设计的关键因素。为了满足高速串行系统的设计要求,提升系统的整体稳定性,成功观察到信号中存在的抖动成分并对其进行分离在信号完整性分析方面具有重要的意义。本文针对高速串行信号,采用定性和定量两种方法进行抖动分析,分别为:基于眼图构建及参数分析的定性分析方法和基于直方图尾部拟合的定量抖动分离分析方法。为方便进行数据处理,需要对信号进行时钟恢复,作为眼图构建和抖动分离的前提和基础。本论文的主要研究工作包括:在时钟恢复方面,提出了基于相位增量估算的数字锁相环的时钟恢复方法。该方法基于锁相环基本思想,通过对相位增量进行不断校验更改,使之逐渐向标准信号接近,通过反复比较最终锁定相位,确定信号中包含的时钟信息。该方法同硬件锁相环时钟恢复方法相比,避免了由硬件本身带来的抖动成分,在数据测量的准确度上得到了良好的提升。在眼图构建与参数分析方面,对传统的眼图构建方法进行了改进,实现了基于同步切割、叠加显示方法的眼图构建。该方法通过对传输信号进行同步切割,完整地保持了信号的原始特征,解决了由同步触发方式产生的信号干扰问题,使生成的眼图能够更真实地反映信号的特征。最后提出了一种新的眼图基准点确定方法,通过眼图参数测量的方式对眼图性能进行验证。在抖动分离方面,提出了一种基于尾部拟合的抖动分离方法。该方法基于双狄拉克模型,通过对抖动建模的方式分析确定性抖动及随机性抖动的特性,利用尾部拟合算法在直方图中确定尾部,通过拟合分析成功分离出确定性抖动及随机性抖动,实现了高速串行信号中的抖动分离。
[Abstract]:Due to the existence of jitter, the performance of the whole system is often greatly affected during the transmission of high-speed serial signal, and jitter has become a key factor restricting the design of high-speed digital system. In order to meet the design requirements of high-speed serial system and improve the overall stability of the system, it is of great significance to observe and separate the jitter components in the signal successfully in the aspect of signal integrity analysis. In this paper, qualitative and quantitative methods are used to analyze the jitter of high speed serial signals, which are qualitative analysis method based on eye chart construction and parameter analysis and quantitative jitter separation analysis method based on histogram tail fitting. In order to process the data conveniently, the clock recovery of the signal is needed, which is the premise and foundation of eye diagram construction and jitter separation. The main research work of this thesis is as follows: in the aspect of clock recovery, a clock recovery method based on phase increment estimation for digital phase-locked loop (DPLL) is proposed. Based on the basic idea of PLL, the phase increment is constantly checked and changed to make it close to the standard signal, and the clock information contained in the signal is determined by repeated comparison of the final locked phase. Compared with the hardware phase-locked loop (HPLL) clock recovery method, this method avoids the jitter caused by the hardware itself and improves the accuracy of data measurement. In the aspect of eye chart construction and parameter analysis, the traditional eye diagram construction method is improved, and the eye diagram construction based on synchronous cutting and superposition display method is realized. By cutting the transmitted signal synchronously, the original feature of the signal is kept intact, the interference problem of the signal generated by the synchronous trigger is solved, and the generated eye diagram can reflect the characteristics of the signal more truthfully. Finally, a new method for determining the reference point of ophthalmogram is proposed, and the performance of the eye diagram is verified by measuring the parameters of the eye chart. In the aspect of jitter separation, a method of jitter separation based on tail fitting is proposed. Based on the dual Dirac model, this method analyzes the characteristics of deterministic jitter and random jitter by modeling the jitter, and uses the tail fitting algorithm to determine the tail in the histogram. The deterministic jitter and random jitter are separated successfully by fitting analysis, and the jitter separation in high-speed serial signal is realized.
【学位授予单位】：北京交通大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN911.6

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