基于FPGA的超高速CameraLink图像传输

发布时间：2018-05-06 13:35

本文选题：信息处理技术 + CameraLink　；参考：《吉林大学学报(工学版)》2017年05期

【摘要】：基于现场可编程门阵列(FPGA)XC6LX100T设计了两套CameraLink接口传输的硬件平台,提出在实验中结合使用片上调试工具Chipscope和同步发生源模块用于精确测量FPGA中的传输误码的方法,详细对比了基于FPGA设计的CameraLink接口与DS90CR287、DS90CR288A的传输效果。结果表明:相对现今主流CameraLink接口电路,本文使用低压差分对代替大量并行数据线,最高可支持154 MHz像素时钟,单个CameraLink接口的传输速率可达4.31Gbit/s,突破了串并转换芯片传输速率的瓶颈,FPGA直接输出的CameraLink数据可以驱动6m的CameraLink传输线,图像可长时间正常无误显示,设计的系统可应用于各种基于CameraLink接口的传输系统。
[Abstract]:Based on FPGA FPGA XC6LX100T, two sets of hardware platforms for CameraLink interface transmission are designed. A method of accurately measuring transmission error codes in FPGA using on-chip debugging tool Chipscope and synchronous source module is proposed. The transmission effect of CameraLink interface based on FPGA and DS90CR287 / DS90CR288A is compared in detail. The results show that compared with the current mainstream CameraLink interface circuits, this paper uses low-voltage differential pairs instead of a large number of parallel data lines, and can support up to 154 MHz pixel clock. The transmission rate of a single CameraLink interface can reach 4.31 Gbit / s, which breaks through the bottleneck of serial-parallel conversion chip transmission rate. The CameraLink data directly output by FPGA can drive a 6m CameraLink transmission line, and the image can be displayed correctly for a long time. The designed system can be applied to various transmission systems based on CameraLink interface.
【作者单位】：中国科学院长春光学精密机械与物理研究所;中国科学院大学;电子科技大学微电子与固体电子学院;
【基金】：国家自然科学基金项目(61405191)
【分类号】：TN919.8

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