基于FPGA的光纤通道点对点传输系统设计与实现

发布时间：2018-05-31 02:46

本文选题：光纤通道 + 帧　；参考：《电子科技大学》2017年硕士论文

【摘要】：在短时间传输大量数据的需求越来越多时,并行传输随着工作频率提高会遇到瓶颈。在高频率远距离传输时,即使并行的信号线长度上有细微的差别,在接收端相位也可能会有较大差别,同时也会有信号串扰问题。虽然一些措施可以解决这些问题,但代价通常很大。在高频远距离传输时,串行通信相比并行传输有不可比拟的优势。随着半导体工艺水平的提高,串行器件的工作频率可以做的很高,且不会有并行通信的串扰问题,使得单根信号线上的传输带宽可以做到很大。相比普通的同轴电缆,光纤材质作为传输介质有很多优点。依靠光在通路上来回反射传输,信号不易受电磁波干扰。传输带宽可以很高,适合需要传输大量数据的场合。并且信号损耗低,远距离传输时不需要大量的信号中继。本文对光纤通道的FC-FS协议进行了详细的分析,FC-FS协议说明了FC帧格式和光纤通道的基本控制特性。通过对光纤通道相关协议的分析,本文设计实现了光纤通道的传输物理层、编解码层、帧传输层。物理层通过开发板自带的RocketIO核和高速光电转换模块实现。帧编解码层实现了发送端对32字节数据的编码传送和接收端数据对齐以及解码还原。将帧数据和帧信息分别缓存,实现了发送端帧的组装和接收端帧的提取机制。在接收端数据校验出错时,设计并仿真了一种差错重传的机制。实现了通路状态控制器,为帧传输提供高速通道,并可处理传送中常见异常。设计了缓存状态控制器,在确保对方缓存空间足够的情况下,可以向对方发送帧。通过以上模块,设计实现了两节点间帧的发送和提取。设计基于Xilinx Virtex 5平台开发,借助Isim等仿真工具对设计进行了自底向上的仿真验证。通过nLint和Questa CDC等调试工具对设计中的波形仿真工具难以发现的潜在跨时钟等问题进行了查找与优化,提高了系统的稳定性。并通过Chipscope对设计进行了板级调试,验证了设计的正确性。
[Abstract]:When the demand for a large amount of data is transmitted in a short time, the parallel transmission will meet the bottleneck with the increase of frequency. In the long distance transmission, even if there is a slight difference in the length of the parallel signal line, there may be a big difference at the receiver phase, and there will be a signal crosstalk problem. Some measures can be solved. With high frequency and long distance transmission, serial communication has an incomparable advantage over parallel transmission. With the improvement of semiconductor technology, the working frequency of serial devices can be very high, and there will be no parallel communication problem, which makes the transmission bandwidth of single signal line can be achieved very well. Compared with common coaxial cable, fiber material has many advantages as transmission medium. The signal is not easily interfered by electromagnetic wave depending on the transmission of light back and forth on the path. The transmission bandwidth can be very high, it is suitable for a large number of data, and the signal loss is low and the long distance transmission does not require a large number of signal relay. The FC-FS protocol of the fiber channel is analyzed in detail. The FC-FS protocol illustrates the basic control characteristics of the FC frame format and the fiber channel. Through the analysis of the fiber channel correlation protocol, the transmission physical layer, the codec layer, the frame transmission layer are designed and implemented. The physical layer is developed by developing the RocketIO core and the high-speed photoelectric conversion by the development board. The frame codec layer realizes the transmission and receiver data alignment and decoding reduction. The frame data and the frame information are cached separately. The transmission end frame assembly and the receiver frame extraction mechanism are realized. A error retransmission machine is designed and simulated when the data check is error at the receiver. The path state controller is implemented, which provides a high-speed channel for frame transmission and can handle the common exceptions in the transmission. A cache state controller is designed to send frames to each other to ensure that the other side's cache space is sufficient. Through the above modules, the frame is sent and extracted between the two nodes. The design is based on the Xilinx Virtex 5. The platform is developed with the aid of Isim and other simulation tools to verify the bottom up of the design. Through the debugging tools such as nLint and Questa CDC, the problems such as the potential cross clock, which are difficult to find by the waveform simulation tool in the design, are searched and optimized, and the stability of the system is improved. And the board level debugging is carried out through the Chipscope design. The correctness of the design is verified.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN929.11

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