宽带、高线性度、低杂散Chirp信号的仿真与实现

发布时间：2018-06-10 17:10

本文选题：chirp信号 + 锁相环　；参考：《电子科技大学》2017年硕士论文

【摘要】：chirp信号又称啁啾信号,因其发出的声音类似鸟叫声”啁啾”而得名。作为一种典型的非平稳信号,在微波通信、声呐、合成孔径雷达成像等多个领域有广泛的应用。在雷达测量和电子对抗系统中chirp信号的带宽、线性度、杂散度更是成为制约测量精度、对抗能力的最重要影响因素之一。科研领域对宽带信号和非线性系统的需求日益增加的背景下,使宽带、高线性度、低杂散度的chirp信号合成技术成为一项重要的研究课题。许多科研人员以及学者在chirp信号的高质量合成方面进行了大量的理论研究工作,提出了多种chirp信号合成的解决方案,并进行了一定的实验及仿真,然而随着科技水平的进步,对高质量chirp信号的要求越来越苛刻,主要包括带宽、捷变、捕捉时间等等,已有的成果不能完全没满足科研的客观需要,基础制造业的发展,使更高频率的芯片得以应用,对已有的技术进行创新,应用新型的电子器件,能够合成应用于现阶段科研项目需要的高质量chirp信号。本文以chirp信号合成技术中实时带宽、杂散度、以及相位噪声的理论研究作为基础,着重分析了各环节的系统传输过程,给出了传递函数与关键指标的制约关系,在此基础上,建立了整个系统的数学模型。通过综合论证几种chirp信号合成的解决方案,提出了一种应用高频DDS芯片的宽带快速入锁锁相环的chirp信号产生方法。针对S波段宽带chirp信号存在的主要问题,采用直接数字频率合成技术,锁相环技术,以及可编程逻辑器件进行研究设计。完成了chirp信号合成环节中的大环路带宽设计、低杂散度设计、宽带VCO设计以及数字化设计的研究工作,制作了实际的产品,并对锁相环锁相时间,控制信号逻辑功能等系统设计关键环节进行了仿真与试验检测。仿真与实验结果证明,系统方案设计能够满足实际的科研工程需求,达到预期的设计指标。chirp信号工作频段2560MHz~2960MHz,带宽可达到400MHz,锁相时间小于10us;脉冲重复周期100us;单个脉冲占空比14/15;chirp信号的线性度小于10~(-4)。
[Abstract]:Chirp signal, also called chirp signal, is named after the chirp of bird call. As a typical nonstationary signal, it has been widely used in microwave communication, sonar, synthetic aperture radar imaging and other fields. In radar measurement and electronic countermeasure system, the bandwidth, linearity and spurious degree of chirp signal have become one of the most important factors that restrict the measurement accuracy and countermeasure capability. With the increasing demand for wideband signals and nonlinear systems in the field of scientific research, chirp signal synthesis technology with wide band, high linearity and low spurious degree has become an important research topic. Many researchers and scholars have done a lot of theoretical research on the high quality synthesis of chirp signal, put forward a variety of solutions of chirp signal synthesis, and carried out certain experiments and simulations. However, with the development of science and technology, The requirements for high quality chirp signals are becoming more and more stringent, including bandwidth, agility, capture time and so on. The existing achievements can not completely meet the objective needs of scientific research. The development of basic manufacturing industry has enabled higher frequency chips to be applied. By innovating the existing technology and applying new electronic devices, we can synthesize the high quality chirp signal which is needed in the current scientific research project. Based on the theoretical research of real-time bandwidth, spurious degree and phase noise in chirp signal synthesis technology, the system transmission process of each link is analyzed, and the restriction relation between transfer function and key index is given. The mathematical model of the whole system is established. By synthetically demonstrating several solutions of chirp signal synthesis, a method of chirp signal generation based on high frequency DDS chip is proposed. Aiming at the main problems of S-band wideband chirp signal, direct digital frequency synthesizer (DDS), phase-locked loop (PLL) and programmable logic device (PLD) are used to study and design. The design of large loop bandwidth, low spurious degree, wide band design and digital design of chirp signal synthesizer are completed. The actual product is made, and the phase locked time of PLL is analyzed. Control signal logic function and other key links of system design are simulated and tested. The simulation and experimental results show that the system scheme design can meet the actual needs of scientific research and engineering. The chirp signal has a bandwidth of 400 MHz, a phase locking time of less than 10us. a pulse repetition period of 100us. the linearity of a single pulse duty cycle of 14 / 15 chirp signal is less than 10mHz -4U.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN957.51

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