基于FPGA的视频图像采集与预处理系统设计

发布时间：2018-06-28 10:38

  本文选题：视频图像采集 + 视频图像预处理　； 参考：《西安理工大学》2017年硕士论文

【摘要】：图像的高速采集与实时处理在国防军事、工业控制、安全防控等领域具有十分重要的应用价值。而现场可编程门阵列(FPGA)以其集成度高、应用灵活、设计周期短、开发成本低等特点,广泛地应用在视频图像采集与处理领域。FPGA的并行处理能力与流水线作业能显著地提高视频图像处理的速度,因此基于FPGA的系统设计成为图像采集与处理领域的主流解决方案。首先确定了基于FPGA的视频图像采集与预处理系统的设计方案。系统主要由图像采集和图像预处理两大部分组成。在图像采集部分中,CCD图像传感器输出模拟CVBS信号,经视频解码芯片ADV7181B将模拟信号转换成数字信号,再通过视频解码模块将其解码成CCIR656 YCbCr4:2:2格式的数据信号,然后利用乒乓操作轮流的存储在两片SDRAM中。在图像预处理部分中,详细论述了 Sobel边缘检测算法和形态学滤波算法的运算原理,以及图像边缘检测与轮廓提取的实现方法,采用色度空间转换将YCbCr4:2:2格式数据转换成RGB格式通过VGA接口显示。使用VerilogHDL完成基于FPGA的I2C配置模块、视频解码模块、SDRAM控制模块、图像预处理模块、VGA显示接口模块等硬件电路设计。在Modelsim中对各个模块进行了仿真验证,然后将这些模块构成的系统顶层设计文件,经Altera公司的Quartus Ⅱ 13.0环境编译后,下载到开发板进行实验,结果证明了设计方案的可行性和正确性,达到预期的设计目的。
[Abstract]:High-speed image acquisition and real-time processing have important application value in the field of national defense, industrial control, safety control and so on. Field Programmable Gate Array (FPGA) is characterized by its high integration, flexible application, short design period and low development cost. The parallel processing ability and pipelining of FPGA are widely used in the field of video image acquisition and processing, so the system design based on FPGA has become the mainstream solution in the field of image acquisition and processing. Firstly, the design scheme of video image acquisition and preprocessing system based on FPGA is determined. The system consists of two parts: image acquisition and image preprocessing. In the part of image acquisition, CCD image sensor outputs analog CVBS signal. The analog signal is converted into digital signal by video decoding chip ADV7181B, and then decoded into CCIR656 YCbCr4: 2: 2: 2 data signal by video decoding module. Then the ping-pong operation is stored in two pieces of SDRAM in turn. In the part of image preprocessing, the operation principle of Sobel edge detection algorithm and morphological filter algorithm is discussed in detail, as well as the realization method of image edge detection and contour extraction. The YCbCr4: 2: 2 format data is transformed into RGB format by color space conversion. I 2C configuration module based on FPGA, video decoding module SDRAM control module, image preprocessing module and VGA display interface module are designed with Verilog HDL. Each module is simulated and verified in Modelsim, and then the top-level design file of the system is compiled by Quartus 鈪，

本文编号：2077714