基于安全ASIC密码芯片PCIE加密卡系统的设计与实现
发布时间：2018-08-21 11:10
【摘要】：随着科技的发展和社会的进步,传统接口对数据的传输越来越不能满足用户的需求。并且用户对数据传输安全性的认知和需求也越来越高。本设计就满足了用户大数据、高安全性的需求。本文详细的阐述了基于国内某款高性能ASIC安全密码芯片PCIE加密卡系统的设计与实现。本设计主要包括两个方面:1、FPGA实现PEX8311芯片与安全ASIC密码芯片进行数据交互。开发Verilog HDL代码,用状态机实现密码芯片的时序要求。并且对Verilog HDL代码进行仿真测试,以验证其正确性,实现真正的数据交互。2、在PC端设计上位机软件,开发C++代码,并对上位机软件的C++代码进行调试,测试与验证,保证其能够将正确的数据、地址、命令等发送到密码芯片。本设计采用PEX8311芯片,实现上位机软件与FPGA芯片进行数据交互,通过PEX8311芯片将数据发送到FPGA,在通过FPGA的内部逻辑将数据发送到安全ASIC密码芯片。实现了PC端上位机软件对密码芯片的灵活控制,上位机软件向安全ASIC密码芯片发送数据,命令,地址等,操纵密码芯片的SM2加解密运算、SM3运算、密钥协商等。本设计最终形成了PCIE加密卡的最小系统,可以让用户更加直观的体验到对密码芯片的控制,满足用户对数据安全性的需求。本设计的创新工作如下:通过利用PEX8311芯片,FPGA内部逻辑,ASIC安全密码芯片,设计成一个PCIE加密卡的最小系统。实现的功能是可以传输大批量的数据,并最终对这些数据进行SM2算法运算和SM3算法运算,以确保数据的安全性。采用PCIE接口进行数据传输,支持PCIE 1.0a标准。此接口相比于传统接口,如:USB、SPI、UART等,传输的数据量更大,速度更快,可以满足用户对大数据传输的需求。由于PEX8311芯片与ASIC安全密码芯片的时序完全不同,因此本设计采用Verilog HDL语言设计状态机仿造密码芯片的时序要求,以完成PEX8311芯片与密码芯片的数据交互。本设计完全站在用户使用方便快捷,满足用户需求的角度来完成PCIE加密卡系统的设计与实现。
[Abstract]:With the development of science and technology and the progress of society, the traditional interface can not meet the needs of users more and more. Moreover, the users' cognition and demand for data transmission security are more and more high. This design meets the needs of user big data, high security. In this paper, the design and implementation of PCIE encryption card system based on a high performance ASIC secure cipher chip is described in detail. This design mainly includes two aspects: PEX8311 chip and secure ASIC cipher chip. Development of Verilog HDL code, state machine to achieve the timing requirements of the cryptographic chip. The Verilog HDL code is simulated and tested to verify its correctness, to realize real data interaction. 2. To design PC software on PC, develop C code, and debug, test and verify the C code of PC software. Make sure it can send the correct data, address, command and so on to the password chip. The design uses PEX8311 chip to realize the data interaction between host computer software and FPGA chip, sends data to FPGA through PEX8311 chip, and sends data to secure ASIC cipher chip through the internal logic of FPGA. The PC software realizes the flexible control of the cipher chip. The PC software sends data, commands, addresses to the secure ASIC cipher chip, and controls the SM2 encryption and decryption operation of the cipher chip, such as SM3 operation, key agreement and so on. This design finally forms the minimum system of PCIE encryption card, which can make users experience the control of cipher chip more intuitively, and meet the demand of data security. The innovative work of this design is as follows: by using PEX8311 chip to design a minimum system of PCIE encryption card by using PEX8311 internal logic and ASIC security cipher chip. The function is to transmit large quantities of data, and finally carry out SM2 algorithm and SM3 algorithm operation to ensure the security of the data. PCIE interface is used for data transmission, which supports PCIE 1.0a standard. Compared with the traditional interface, such as: USB big data, this interface can transmit more data and faster, so it can meet the needs of users for big data transmission. Because the timing of PEX8311 chip and ASIC security cipher chip is completely different, this design adopts Verilog HDL language to design state machine to simulate the timing requirement of cryptographic chip, in order to complete the data interaction between PEX8311 chip and cipher chip. This design is based on the user's convenience and convenience to meet the user's needs to complete the design and implementation of the PCIE encryption card system.
【学位授予单位】：辽宁大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN918.4
[Abstract]:With the development of science and technology and the progress of society, the traditional interface can not meet the needs of users more and more. Moreover, the users' cognition and demand for data transmission security are more and more high. This design meets the needs of user big data, high security. In this paper, the design and implementation of PCIE encryption card system based on a high performance ASIC secure cipher chip is described in detail. This design mainly includes two aspects: PEX8311 chip and secure ASIC cipher chip. Development of Verilog HDL code, state machine to achieve the timing requirements of the cryptographic chip. The Verilog HDL code is simulated and tested to verify its correctness, to realize real data interaction. 2. To design PC software on PC, develop C code, and debug, test and verify the C code of PC software. Make sure it can send the correct data, address, command and so on to the password chip. The design uses PEX8311 chip to realize the data interaction between host computer software and FPGA chip, sends data to FPGA through PEX8311 chip, and sends data to secure ASIC cipher chip through the internal logic of FPGA. The PC software realizes the flexible control of the cipher chip. The PC software sends data, commands, addresses to the secure ASIC cipher chip, and controls the SM2 encryption and decryption operation of the cipher chip, such as SM3 operation, key agreement and so on. This design finally forms the minimum system of PCIE encryption card, which can make users experience the control of cipher chip more intuitively, and meet the demand of data security. The innovative work of this design is as follows: by using PEX8311 chip to design a minimum system of PCIE encryption card by using PEX8311 internal logic and ASIC security cipher chip. The function is to transmit large quantities of data, and finally carry out SM2 algorithm and SM3 algorithm operation to ensure the security of the data. PCIE interface is used for data transmission, which supports PCIE 1.0a standard. Compared with the traditional interface, such as: USB big data, this interface can transmit more data and faster, so it can meet the needs of users for big data transmission. Because the timing of PEX8311 chip and ASIC security cipher chip is completely different, this design adopts Verilog HDL language to design state machine to simulate the timing requirement of cryptographic chip, in order to complete the data interaction between PEX8311 chip and cipher chip. This design is based on the user's convenience and convenience to meet the user's needs to complete the design and implementation of the PCIE encryption card system.
【学位授予单位】：辽宁大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN918.4
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