宽带可重构数字射频发射机关键技术研究
[Abstract]:With the rapid development of software radio technology, receiver technology has been very mature at home and abroad, but the research of broadband reconfigurable digital RF transmitter is less. Digital mixer and frequency synthesizer are used directly in broadband reconfigurable digital radio frequency transmitter, which simplifies the complexity of circuit design and debugging brought by using analog devices, and makes the performance of wireless communication system more stable. In this paper, a whole scheme of broadband reconfigurable digital radio frequency transmitter is put forward, and the concrete scheme of digital signal synthesis based on FPGA in this transmitter is analyzed. The digital signal synthesis mainly includes digital up-conversion and signal synthesis at specific frequencies. The key technologies involved in the synthesis are analyzed in detail, such as low pass increment summation modulation, polar coordinate conversion and DDS digital phase modulation. The main results of this study are as follows: 1) the low pass incremental summation modulation technique involved is studied and designed. The modulation technology has the ability of noise reduction and anti-jamming. The first and second order increment summation modulators are modeled by SIMULINK based on MATLAB. The over-sampling rate OSR is all set to 12881 bit quantization. Finally, the simulation results show that the signal-to-noise ratio of the second order modulator is about 99 dB, and that of the first order modulator is about 73 dB, which is close to the value calculated directly from the signal-to-noise ratio formula. At the same time, comparing the spectrum of the two final output signals, the results show that the noise reduction effect of the second order modulator is obviously better than that of the first order, and the signal-to-noise ratio (SNR) is significantly improved by about 26 dB. 2) the polar coordinate conversion technology involved is studied and designed. The polar coordinate transformation of the modulated IQ signal is realized. First, we set the IQs signal as cosine and sine wave of frequency 5 Hz, and then we use MATLAB to simulate the polar diameter r is a constant. Conclusion .3) the DDS digital phase modulation technique is studied and designed to synthesize the signals with phase modulation and required frequency. First, the SIMULINK model is established, and the reference source cf is set to 125 MHz, phase accumulator bit N is 20, and the frequency control word K is selected to be 2 / 15 / 2 / 1 / 13 / 2 / 11 respectively for simulation, and the corresponding signal spectrum is obtained. The signal frequency obtained from the spectrum diagram is about 2.45 ~ 10 ~ 7 rad/s,6.14*10~6rad/s,1.53*10~6 rad/s, respectively, which satisfies the calculation formula of the synthetic signal frequency f _ s _ 0 K f_c/2~N. It is further proved that changing K can adjust the frequency value of the final synthetic signal of the DDS system. Secondly, the frequency of the final synthetic signal of the DDS system can be adjusted when the signal frequency is changed. The SIMULINK modeling and simulation of common 2PSK modulation technology are carried out by keying method and analog method, which lays a foundation for the simulation and verification of DDS digital phase modulation technology. Finally, the SIMULINK model of DDS digital phase modulation technology is established, and each parameter setting is the same as that of the previous DDS system. Taking only K 182 as an example to simulate, the 2PSK signal is output by setting the deflection phase signal of fixed period. The whole scheme of digital up-conversion and signal synthesis in the transmitter is realized in FPGA, finally downloaded to the FPGA development chip, and the output waveform of every key module is observed by using CHIPSCOPE software. The frequency of the output signal is about 21.4 MHz, which is similar to the frequency corresponding to the frequency control word K of 764504178, which verifies the rationality of the whole scheme.
【学位授予单位】:杭州电子科技大学
【学位级别】:硕士
【学位授予年份】:2017
【分类号】:TN838
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