短时猝发通信系统基带设计与FPGA实现

发布时间：2018-11-10 16:18

【摘要】：军事通信中存在的各种各样的干扰,给数据的正确发送和接收带来了极大的挑战,而猝发通信具有信息传输时间短和信息发送时间不确定的特点,其信号频谱信息较难获取,可躲避来自人为的恶意干扰。猝发通信在军事领域已作为一种常用的通信方式。本论文以“xxxx系统”项目为研究背景,主要研究了在低带宽下信息的快速传输,以实现短时猝发通信。本文对该通信系统基带进行研究,设计了短时猝发通信的帧结构,由误码性能接近香农极限的低密度奇偶校验(LDPC)码作为信道编码方案,采用了具有恒包络性质的GMSK调制方式。根据理论研究与设计仿真,对基带部分的设计使用Verilog语言在FPGA中实现。文中给出了发射端和接收端主要模块的设计方法、实现流程和仿真结果。本文的主要贡献有以下几点:1、依据短时猝发通信的特点,设计了一种具有较高数据传输效率的帧结构。该帧结构由同步序列和数据帧两部分构成,提出了分布式帧同步方法,分布式的同步序列可以实现系统的定时同步和帧同步,并且降低帧同步的虚警率。并针对该帧结构,设计了对应的系统同步方案。2、基于本文LDPC校验矩阵固化的特点,在LDPC编码过程中,采用固定的逻辑结构实现编码算法,省去了迭代器编码运算过程;在译码过程中,采用了改进的最小和译码算法,减少了FPGA的资源消耗。3、针对GMSK一比特差分解调时除法和正切运算需消耗大量的存储资源的问题,采用了相位差分进行解调。并依据其前置滤波器系数特点对滤波算法采用了优化设计,进一步降低了FPGA存储资源的消耗。4、在信号检测模块中,相关峰的捕获运算需消耗大量的FPGA资源,对该运算过程中乘累加器实现结构进行了优化,减少了逻辑资源的使用量。
[Abstract]:The existence of various kinds of interference in military communication brings great challenges to the correct transmission and reception of data. However, burst communication has the characteristics of short information transmission time and uncertain information transmission time, so it is difficult to obtain signal spectrum information. Avoid malicious interference from human beings. Burst communication has become a common communication method in the military field. In this thesis, the research background of "xxxx system" is "xxxx system", which mainly studies the fast transmission of information in low bandwidth to realize short-time burst communication. In this paper, the baseband of the communication system is studied, and the frame structure of the short time burst communication is designed. The low density parity check (LDPC) code with the performance of error code approaching the Shannon limit is used as the channel coding scheme. The GMSK modulation mode with constant envelope property is adopted. According to theoretical research and design simulation, the design of baseband part is implemented in FPGA with Verilog language. The design method of the main modules of the transmitter and receiver is given, and the implementation flow and simulation results are also given in this paper. The main contributions of this paper are as follows: 1. According to the characteristics of short time burst communication, a frame structure with high data transmission efficiency is designed. The frame structure is composed of synchronous sequence and data frame. A distributed frame synchronization method is proposed. The distributed synchronization sequence can realize the timing synchronization and frame synchronization of the system and reduce the false alarm rate of frame synchronization. According to the frame structure, the corresponding system synchronization scheme is designed. 2. Based on the solidification of the LDPC check matrix in this paper, in the process of LDPC coding, a fixed logic structure is adopted to realize the coding algorithm, and the iterative coding operation process is eliminated. In the process of decoding, an improved minimum sum decoding algorithm is adopted to reduce the resource consumption of FPGA. 3. In order to solve the problem that division and tangent need to consume a lot of storage resources in GMSK one-bit differential demodulation, phase difference division is used to demodulate. According to the characteristics of prefilter coefficients, the filter algorithm is optimized, which further reduces the consumption of FPGA storage resources. In the signal detection module, the acquisition of correlation peaks consumes a lot of FPGA resources. The structure of multiplicative accumulator is optimized and the usage of logical resources is reduced.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：E96;TN975

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