低速率毫米波通信数据链研究与验证

发布时间：2019-03-09 15:29

【摘要】：数据链是链接信息化战场上多种作战平台,是用来传输和处理战术信息的数据通信链路系统。数据链在现代通信系统中扮演的角色越来越重要,并且得到了快速发展。目前数据链研究内容包括高速率信息传输、低时延、大容量、抗干扰和高保密性等特性。论文以现有战术数据链技术作为参考,对低速率毫米波通信数字链路的物理层技术展开研究。在分析了低速率毫米波通信数据链路的整体设计目标的基础上,设计了带宽为1MHz、最长通信距离为220km、误比特率低于10-6和通信速率支持500bps的通信链路物理层传输方案。物理层设计重点主要包括以下两个方面。第一,针对上下变频模块中受限于FPGA Field-Programmable Gate Ar(ray,现场可编程门阵列)时钟频率的问题,提出了一种多相数字滤波的实现方法。在FPGA时钟频率为250MHz的条件下,通过多相的方式实现数字信号从300Msps采样速率内插到2.4Gsps采样速率(抽取时则正好反过来)。第二,在载波同步模块设计时,通过对基于快速傅里叶变换的频偏估计和锁相环载波同步这两种方案分别进行仿真。结果表明,本方案在AWGN信道下、信噪比为-16dB、多普勒频移为90kHz情况下,锁相环载波同步方案的误比特率达到需求指标,而基于快速傅里叶变换的频偏估计方案则达不到误比特率指标。在完成低速率毫米波通信数据链路的方案实现后,进行了场地测试,包括误比特率测试、锁相环载波同步误差测试,利用测试结果来验证设计方案的可行性。
[Abstract]:Data link is a data communication link system which is used to transmit and process tactical information on a variety of combat platforms on the information-based battlefield. Data link plays a more and more important role in modern communication system, and has been developed rapidly. At present, the research contents of data link include high-speed information transmission, low delay, large capacity, anti-interference and high confidentiality and so on. Based on the existing tactical data link technology, the physical layer technology of low-rate millimeter-wave communication digital link is studied in this paper. Based on the analysis of the overall design objectives of the low-rate millimeter-wave communication data link, a communication link physical layer transmission scheme with bandwidth of 1MHz, longest communication distance of 220km, bit error rate of less than 10km and communication rate supporting 500bps is designed. The emphasis of physical layer design mainly includes the following two aspects. Firstly, aiming at the problem that the clock frequency is limited by FPGA Field-Programmable Gate Ar (ray, field programmable gate array (FPGA) in the up-and-down converter module, a multi-phase digital filtering method is proposed. When the FPGA clock frequency is 250MHz, the digital signal is interpolated from the 300Msps sampling rate to the 2.4Gsps sampling rate in a multiphase manner (the reverse is the reverse when decimated). Second, in the design of carrier synchronization module, the frequency offset estimation based on fast Fourier transform and phase locked loop carrier synchronization are simulated respectively. The results show that when the signal-to-noise ratio is-16dB and the Doppler frequency shift is 90kHz, the bit error rate of phase-locked loop carrier synchronization scheme can reach the requirement target in the AWGN channel, and the signal-to-noise ratio is-16dB and the Doppler frequency shift is 90kHz. However, the frequency offset estimation scheme based on Fast Fourier transform (FFT) can not meet the bit error rate (BER). After the implementation of the low-rate millimeter-wave communication data link, the site test is carried out, including bit error rate test, phase-locked loop carrier synchronization error test, and the test results are used to verify the feasibility of the design.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN919.2

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