同时同频全双工RLS数字自干扰抑制关键技术与验证

发布时间：2019-03-26 11:25

【摘要】：同时同频全双工技术可以有效提升频谱资源利用率,缓解当前频谱资源紧张现状,但由于其受到自干扰问题的限制,因此暂未被广泛使用。目前,同时同频全双工需要解决的核心问题就是其自干扰问题。常见的自干扰抑制方案包括天线自干扰抑制、射频自干扰抑制、数字自干扰抑制三种。本文针对同时同频全双工RLS数字自干扰抑制问题进行研究,主要内容如下:首先,研究了典型RLS数字自干扰抑制方案,并将WL结构引入全双工自干扰抑制。主要分析验证了典型RLS用于单发单收和两发两收全双工数字自干扰抑制的有效性,同时引入了两种主要的、针对两发两收全双工的自干扰抑制结构并分析了其自干扰抑制性能。其次,研究了DCD-RLS数字自干扰抑制方案。介绍了DCD-RLS算法的原理,给出了复数域的DCD-RLS算法的实现流程,分析了DCD-RLS算法的性能及复杂度。同时,针对单发单收和两发两收全双工,验证分析了DCD-RLS自干扰抑制方案性能。再次,提出了BA-CD-RLS算法,并研究了基于该算法的自干扰抑制方案。介绍了CD算法的原理,提出了BA-CD算法;给出了BA-CD-RLS算法的实现流程并分析了BA-CD-RLS算法的性能和复杂度。针对单发单收和两发两收全双工,验证分析了BA-CD-RLS自干扰抑制方案性能。最后,总结了本文讨论的多种自干扰抑制方案,并进行了对比分析。对全文提出的基于3种RLS算法的9种自干扰抑制方案进行了归纳,对比分析了基于DCD-RLS算法与BA-CD-RLS算法的6种自干扰抑制方案的性能,并重点分析了3种RLS算法的复杂度。这些工作为不同应用场景下的方案选择提供依据。本文主要研究了同时同频全双工中使用RLS类算法进行数字自干扰抑制的多种方案,对各方案的性能进行了验证、分析和对比。针对FPGA实现,提出了一种新的RLS类实现算法。经过验证,该算法在对自干扰抑制性能影响较小的情况下,可以有效降低RLS数字自干扰抑制方案的计算复杂度。
[Abstract]:At the same time, the co-frequency full-duplex technology can effectively improve the utilization of spectrum resources and alleviate the current shortage of spectrum resources. However, due to the limitation of self-interference, it has not been widely used for the time being. At present, the core problem to be solved at the same time is the self-interference problem. Common self-interference suppression schemes include antenna self-interference suppression, radio frequency self-interference suppression and digital self-interference suppression. The main contents of this paper are as follows: firstly, a typical RLS digital self-interference suppression scheme is studied, and the WL structure is introduced into the full-duplex self-interference suppression scheme. In this paper, we mainly analyze and verify the effectiveness of the typical RLS used in the suppression of full-duplex digital self-interference in single and two-receive digital signals. At the same time, we introduce two main self-interference suppression structures for two-send-two-receive full-duplex and analyze their self-interference suppression performance. Secondly, the scheme of DCD-RLS digital self-interference suppression is studied. In this paper, the principle of DCD-RLS algorithm is introduced, the realization flow of DCD-RLS algorithm in complex field is given, and the performance and complexity of DCD-RLS algorithm are analyzed. At the same time, the performance of the DCD-RLS self-interference suppression scheme is verified and analyzed for single-send single-receiver and two-send-two-receive full duplex. Thirdly, the BA-CD-RLS algorithm is proposed, and the self-interference suppression scheme based on the algorithm is studied. This paper introduces the principle of CD algorithm, puts forward the BA-CD algorithm, gives the implementation flow of BA-CD-RLS algorithm, and analyzes the performance and complexity of BA-CD-RLS algorithm. The performance of the BA-CD-RLS self-interference suppression scheme is verified and analyzed for the single-send single-receiver and two-send-two-receive full duplex. Finally, several self-interference suppression schemes discussed in this paper are summarized and compared. Nine self-interference suppression schemes based on three RLS algorithms are summarized in this paper. The performance of six self-interference suppression schemes based on DCD-RLS algorithm and BA-CD-RLS algorithm is compared and analyzed. The complexity of three RLS algorithms is analyzed in detail. These work provide the basis for the scheme selection in different application scenarios. In this paper, several schemes of digital self-interference suppression using RLS algorithm in the same frequency full duplex are studied, and the performance of each scheme is verified, analyzed and compared. In this paper, a new RLS class implementation algorithm for FPGA implementation is proposed. It is verified that the proposed algorithm can effectively reduce the computational complexity of RLS digital self-interference suppression scheme with little influence on the performance of self-interference suppression.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN929.5

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