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多通道高精度符合计数器的研究与设计

发布时间:2018-07-26 11:11
【摘要】:符合计数器是一种测量处于纠缠态下多个光子之间时间相关性的统计测量系统,它广泛的应用于量子纠缠源的制备、光子干涉实验、量子隐形传送、量子密钥分发等领域,随着量子通信和量子计算的快速发展,如何提高符合计数器装置的测量精度成为量子符合测量领域的一项重要课题。本次设计旨在设计实现一种八通道高精度的符合计数器系统,为了提高符合计数器系统的测量精度,设计中提出了时间内插的设计思想,符合计数器的设计工作主要包括硬件设计和逻辑设计两大部分,设计的重点主要在于FPGA的逻辑设计部分。首先,在硬件设计方面,处于纠缠态的多光子分别通过单光子探测器将探测到的光子转换为电脉冲,然后通过甄别电路对探测器输出的电脉冲进行边沿定时甄别,论文通过对不同甄别电路进行比较分析,最终选择了基于低通滤波器的恒比定时甄别电路,然后将甄别信号依次经过脉宽调整电路、延时补偿电路,最终分别送至FPGA进行符合测量,并将符合测量的结果通过以太网接口传送到上位机以供存储和分析,同时为了提高符合计数器系统的硬件性能,设计中对八个通道进行了差分布线并且使用了射极耦合逻辑电平接口标准。其次,在逻辑设计方面,设计中采用了粗细时间测量的符合方法,在FPGA内部搭建了八路128级快速进位链对符合测量信号进行时间内插,然后采用200MHz的高速时钟锁存进位链中信号的传输状态,锁存编码记录着测量的细时间,同时采用时钟计数的方法记录着测量的粗时间。设计中为了提高细时间的测量精度,提出了基于相邻比特编码纠错的设计方法,然后采用二分求和法对锁存编码进行译码。由于符合测量过程中光子到达时间的随机性,在选取最先到达信号作为起始信号的前提下,提出起始信号切换方法和符合超时机制来设置合理的测量起点。最后利用测量出来的时间值与符合门宽比对进行符合判别,并对符合判别的结果做出统计。本次设计通过多次统计测量,最终实现了符合分辨率为200ps、输入信号重复频率高达100MHz的八通道符合计数器系统,在论文的最后采用设计的符合计数器和双光子纠缠源验证贝尔不等式。
[Abstract]:Coincidence counter is a kind of statistical measurement system to measure the time dependence of multiple photons in entangled state. It is widely used in the fields of quantum entanglement source preparation, photon interference experiment, quantum teleportation, quantum key distribution and so on. With the rapid development of quantum communication and quantum computing, how to improve the measurement accuracy of coincidence counter has become an important subject in the field of quantum coincidence measurement. The purpose of this design is to design and implement an eight-channel high-precision coincidence counter system. In order to improve the measuring accuracy of the coincidence counter system, the design idea of time interpolation is put forward in the design. The design of coincidence counter includes two parts: hardware design and logic design. The emphasis of the design is the logic design of FPGA. Firstly, in the aspect of hardware design, the multi-photon in the entangled state converts the detected photon into an electric pulse through the single-photon detector, and then the detector outputs the electric pulse by the discriminating circuit. Through the comparison and analysis of different discriminating circuits, the constant ratio timing discriminating circuit based on low pass filter is selected, and then the discriminant signal is passed through the pulse width adjustment circuit and the delay compensation circuit in turn. Finally, the conformance measurement is sent to FPGA, and the result of compliance measurement is transmitted to the upper computer through Ethernet interface for storage and analysis. At the same time, in order to improve the hardware performance of the conformance counter system, In the design, eight channels are divided and the emitter coupled logic level interface standard is used. Secondly, in the aspect of logic design, the coincidence method of thick time measurement is adopted in the design. Eight 128-level fast carry chains are built in FPGA to interpolate the coincidence signal. Then the transmission state of the signal in the carry chain is latched by 200MHz's high speed clock. The latch code records the fine time measured and the coarse time is recorded by the method of clock counting. In order to improve the precision of fine time measurement, a design method based on adjacent bit coding and error correction is proposed, and then the binary sum method is used to decode latch codes. Due to the randomness of photon arrival time in the process of coincidence measurement, under the premise of selecting the first arrival signal as the starting signal, the switching method of the initial signal and the coincidence time-out mechanism are proposed to set a reasonable measurement starting point. Finally, the measured time value and the width of the coincidence gate are used to distinguish the coincidence, and the result of the coincidence discrimination is statistically analyzed. Through many statistical measurements, this design has finally realized an eight-channel coincidence counter system with a coincidence resolution of 200 psand a repetition rate of up to 100MHz. At the end of the thesis, the designed counter and two-photon entanglement source are used to verify Bell's inequality.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2016
【分类号】:TH724

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