球碟转子式微陀螺接口检测电路设计与优化
发布时间：2018-07-25 16:49
【摘要】：陀螺仪传感器是一种应用在惯性空间中的装置,用于检测角位移和相对角速度,在军用领域和民用领域有着普遍地应用,已经成为国内外众多科研机构的研究热点。在目前关于转子式陀螺的研究中,还存在检测精度不够高,转子转速低,加工成本高等问题,因此哈尔滨工业大学MEMS中心提出了一种球碟转子式微陀螺仪,该陀螺具有高精度、转速高、低成本等明显的优势。本文是基于球碟转子式微陀螺设计了一款接口检测ASIC电路。本文详细地分析球碟转子式陀螺微结构及其工作原理,最终确定以相敏解调技术为核心的检测电路方案,着重对整个接口检测电路的进行系统设计与模块划分,详细具体地完成各个电路单元的行为级设计,从而实现整体接口检测ASIC电路的设计。在完成ASIC电路设计过程中,针对检测电路的噪声分析,重点实现C/V转换电路单元和滤波放大单元的低噪声设计,以及正弦载波信号电路单元的自动稳幅控制设计,以确保ASIC电路达到降低输出噪声的要求。同时针对开关相敏解调信号的相位问题,通过0°~-180°移相电路单元的设计,实现解调方波信号相位误差的调整,提升ASIC电路的线性度。本文综合了整体电路的指标要求,在Cadence软件平台下完成了对检测ASIC电路的整体以及各个单元模块的行为级设计,验证检测电路的性能。从仿真结果分析得出,ASIC检测电路的检测范围为5×10-2pF~5×10-8pF,电容相对分辨率为1×10-8,刻度因数为57.0938V/pF,非线性误差为0.021%,等效输出噪声电压为383.3nV/√Hz@40Hz。本文通过Cadence的Virtuoso工具进行版图设计,在0.35μm的CMOS工艺下完成了整体ASIC的版图设计,其版图面积为3mm×2.85mm,并且完成了整体ASIC电路的后仿真验证,结果满足接口检测电路的设计要求。
[Abstract]:Gyroscope sensor is a kind of device used in inertial space, which is used to detect angular displacement and relative angular velocity. Gyroscope sensor has been widely used in military and civil fields, and has become a hot research topic in many research institutions at home and abroad. In the current research on rotor gyroscope, there are still some problems, such as low measuring precision, low rotor speed and high machining cost. Therefore, the MEMS Center of Harbin University of Technology has put forward a kind of spherical disk rotor micro-gyroscope, which has high precision. High speed, low cost and other obvious advantages. In this paper, an interface detection ASIC circuit is designed based on the spherical disk rotor micro gyroscope. In this paper, the microstructure and working principle of the spherical disk rotor gyroscope are analyzed in detail, and the detection circuit scheme with phase sensitive demodulation technology as the core is determined. The system design and module partition of the whole interface detection circuit are emphasized. The behavior level design of each circuit unit is completed in detail, and the design of the whole interface detecting ASIC circuit is realized. In the process of ASIC circuit design, the low noise design of C / V conversion circuit unit and filter amplifier unit and the automatic amplitude stabilization control design of sinusoidal carrier signal circuit unit are mainly realized for the noise analysis of the detection circuit. To ensure that the ASIC circuit meets the requirements of reducing output noise. At the same time, aiming at the phase problem of switch phase sensitive demodulation signal, the phase error adjustment of demodulation square wave signal is realized through the design of 0 掳-180 掳phase shift circuit unit, and the linearity of ASIC circuit is improved. In this paper, the index requirements of the whole circuit are synthesized, and the design of the whole detection ASIC circuit and the behavior level of each unit module is completed under the Cadence software platform, and the performance of the detection circuit is verified. The results of simulation show that the detection range is 5 脳 10-2pF~5 脳 10 ~ (-8) PF, the relative resolution of capacitance is 1 脳 10 ~ (-8), the calibration factor is 57.0938 V / PF, the nonlinear error is 0.021, and the equivalent output noise voltage is 40 Hz / 383.3nV/. In this paper, the layout design of the whole ASIC is completed with the Virtuoso tool of Cadence, and the layout area of the whole ASIC is 3mm 脳 2.85mm in 0.35 渭 m CMOS process. The post-simulation verification of the whole ASIC circuit is completed, and the results meet the design requirements of the interface detection circuit.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN96;TP212
[Abstract]:Gyroscope sensor is a kind of device used in inertial space, which is used to detect angular displacement and relative angular velocity. Gyroscope sensor has been widely used in military and civil fields, and has become a hot research topic in many research institutions at home and abroad. In the current research on rotor gyroscope, there are still some problems, such as low measuring precision, low rotor speed and high machining cost. Therefore, the MEMS Center of Harbin University of Technology has put forward a kind of spherical disk rotor micro-gyroscope, which has high precision. High speed, low cost and other obvious advantages. In this paper, an interface detection ASIC circuit is designed based on the spherical disk rotor micro gyroscope. In this paper, the microstructure and working principle of the spherical disk rotor gyroscope are analyzed in detail, and the detection circuit scheme with phase sensitive demodulation technology as the core is determined. The system design and module partition of the whole interface detection circuit are emphasized. The behavior level design of each circuit unit is completed in detail, and the design of the whole interface detecting ASIC circuit is realized. In the process of ASIC circuit design, the low noise design of C / V conversion circuit unit and filter amplifier unit and the automatic amplitude stabilization control design of sinusoidal carrier signal circuit unit are mainly realized for the noise analysis of the detection circuit. To ensure that the ASIC circuit meets the requirements of reducing output noise. At the same time, aiming at the phase problem of switch phase sensitive demodulation signal, the phase error adjustment of demodulation square wave signal is realized through the design of 0 掳-180 掳phase shift circuit unit, and the linearity of ASIC circuit is improved. In this paper, the index requirements of the whole circuit are synthesized, and the design of the whole detection ASIC circuit and the behavior level of each unit module is completed under the Cadence software platform, and the performance of the detection circuit is verified. The results of simulation show that the detection range is 5 脳 10-2pF~5 脳 10 ~ (-8) PF, the relative resolution of capacitance is 1 脳 10 ~ (-8), the calibration factor is 57.0938 V / PF, the nonlinear error is 0.021, and the equivalent output noise voltage is 40 Hz / 383.3nV/. In this paper, the layout design of the whole ASIC is completed with the Virtuoso tool of Cadence, and the layout area of the whole ASIC is 3mm 脳 2.85mm in 0.35 渭 m CMOS process. The post-simulation verification of the whole ASIC circuit is completed, and the results meet the design requirements of the interface detection circuit.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN96;TP212
【参考文献】
相关期刊论文 前10条
1 王巍;;新型惯性技术发展及在宇航领域的应用[J];红外与激光工程;2016年03期
2 张维煜;朱q，
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