线扫描CMOS图像传感器读出电路关键技术研究
发布时间：2019-01-24 21:07
【摘要】：对于可应用于星载地质灾害监测系统的CMOS图像传感器,必须要考虑的问题是监测系统相对于地面的移动速度极快,导致图像传感器的曝光时间很短,若采用传统的面阵凝视型成像方式,必然会出现图像的残影,成像质量不佳,因此要采用新的成像方式。目前行业内多采用时间延迟积分(TDI)形式的线扫描图像传感器,通过对目标景物的多次曝光,将信号进行累加,相当于增加了曝光时间,从而提升了图像信噪比。本文围绕TDI型CMOS图像传感器读出电路,重点研究了其同步累加时序方式和提升有效累加级数的问题。本文首先根据该读出电路的框架对各个基本模块进行了分析和仿真,并确定采用具有拼接型光电二极管的3管像素结构作为后续仿真的基础,其次,为了保证输出信号摆幅较大时能够有效输出,采用了轨对轨形式的输出缓冲器,该缓冲器能在输入幅度为1.5V~4V,输入频率为2MHz的方波情况下,有效驱动20pF的电容负载,且失调电压小于1mV。接着分析了相关双采样的几种结构,将单端输出结构修改成双端输出结构后应用于本文所研究的读出电路中,以验证运放失调电压对于读出电路的影响,结果表明,修改后的双端结构能够有效抑制失调电压对于读出电路的影响。最后,重点研究了具有TDI功能的模拟域累加器,通过大量的公式推导证明了该结构的合理性,并通过仿真验证了TDI的同步累加性;随后针对有效累加级数的问题做了寄生参数建模,对原结构进行了修改,并通过公式推导证明了该结构的可行性,仿真结果也表明,修改后的结构有利于提高该模拟域累加器的有效累加级数。本文的仿真是基于CSMC 0.5μm的工艺,最终的TDI型CMOS图像传感器读出电路采用的规模为100级,以便阐述和验证该结构的合理性。其中,渡越时间即每行的积分时间定为90μs,最终的仿真表明该累加器线性度为97%。
[Abstract]:For the CMOS image sensor which can be used in the spaceborne geological hazard monitoring system, the problem must be considered is that the monitoring system moves very fast relative to the ground, which results in the very short exposure time of the image sensor. If the traditional plane array staring imaging method is adopted, the residual image will inevitably appear and the imaging quality will be poor. Therefore, a new imaging method should be adopted. At present, the line-scan image sensor in the form of time-delay integral (TDI) is widely used in the industry. Through multiple exposures to the target scene, the signal is accumulated, which is equivalent to increasing the exposure time, thus improving the image signal-to-noise ratio (SNR). Focusing on the readout circuit of TDI type CMOS image sensor, this paper focuses on the problem of synchronously accumulating time sequence and raising effective accumulative series. In this paper, the basic modules are analyzed and simulated according to the frame of the readout circuit, and the three-tube pixel structure with the spliced photodiode is adopted as the basis of subsequent simulation. In order to ensure that the output signal can be effectively output when the amplitude of the output signal is large, the output buffer in the form of rail to rail is adopted. The buffer can effectively drive the capacitance load of 20pF under the condition of the input amplitude of 1.5V / 4V and the input frequency of square wave of 2MHz. The offset voltage is less than 1 MV. Then, several related double sampling structures are analyzed, and the single end output structure is modified to double terminal output structure and applied to the readout circuit studied in this paper to verify the effect of operational amplifier offset voltage on the readout circuit. The results show that, The modified dual-terminal structure can effectively suppress the effect of offset voltage on the readout circuit. Finally, the analog domain accumulator with TDI function is studied, the rationality of the structure is proved by a large number of formula derivation, and the synchronization cumulability of TDI is verified by simulation. Then, the parasitic parameter modeling is done to solve the problem of effective cumulative series, the original structure is modified, and the feasibility of the structure is proved by formula derivation. The simulation results also show that, The modified structure is helpful to improve the effective accumulation series of the analog domain accumulator. The simulation in this paper is based on the process of CSMC 0.5 渭 m, and the final readout circuit of TDI type CMOS image sensor has a scale of 100th in order to explain and verify the rationality of the structure. The transition time, the integral time of each line, is set at 90 渭 s, and the final simulation results show that the linear degree of the accumulator is 97 渭 s.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP212
本文编号：2414860
[Abstract]:For the CMOS image sensor which can be used in the spaceborne geological hazard monitoring system, the problem must be considered is that the monitoring system moves very fast relative to the ground, which results in the very short exposure time of the image sensor. If the traditional plane array staring imaging method is adopted, the residual image will inevitably appear and the imaging quality will be poor. Therefore, a new imaging method should be adopted. At present, the line-scan image sensor in the form of time-delay integral (TDI) is widely used in the industry. Through multiple exposures to the target scene, the signal is accumulated, which is equivalent to increasing the exposure time, thus improving the image signal-to-noise ratio (SNR). Focusing on the readout circuit of TDI type CMOS image sensor, this paper focuses on the problem of synchronously accumulating time sequence and raising effective accumulative series. In this paper, the basic modules are analyzed and simulated according to the frame of the readout circuit, and the three-tube pixel structure with the spliced photodiode is adopted as the basis of subsequent simulation. In order to ensure that the output signal can be effectively output when the amplitude of the output signal is large, the output buffer in the form of rail to rail is adopted. The buffer can effectively drive the capacitance load of 20pF under the condition of the input amplitude of 1.5V / 4V and the input frequency of square wave of 2MHz. The offset voltage is less than 1 MV. Then, several related double sampling structures are analyzed, and the single end output structure is modified to double terminal output structure and applied to the readout circuit studied in this paper to verify the effect of operational amplifier offset voltage on the readout circuit. The results show that, The modified dual-terminal structure can effectively suppress the effect of offset voltage on the readout circuit. Finally, the analog domain accumulator with TDI function is studied, the rationality of the structure is proved by a large number of formula derivation, and the synchronization cumulability of TDI is verified by simulation. Then, the parasitic parameter modeling is done to solve the problem of effective cumulative series, the original structure is modified, and the feasibility of the structure is proved by formula derivation. The simulation results also show that, The modified structure is helpful to improve the effective accumulation series of the analog domain accumulator. The simulation in this paper is based on the process of CSMC 0.5 渭 m, and the final readout circuit of TDI type CMOS image sensor has a scale of 100th in order to explain and verify the rationality of the structure. The transition time, the integral time of each line, is set at 90 渭 s, and the final simulation results show that the linear degree of the accumulator is 97 渭 s.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP212
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