光电法纱线疵点在线检测技术研究
发布时间:2018-03-17 11:46
本文选题:纱线疵点 切入点:光电检测 出处:《西安工业大学》2017年硕士论文 论文类型:学位论文
【摘要】:在纺织行业中,纺织品在工业流水线生产过程中会因原材料、纺织器械、环境条件等多种因素使纱线表面产生疵点,纱线疵点主要表现为纱线直径的突变与纱线表面上存在的脏点,这类出现在纱线上的疵点直接影响纱线品质。为了更有效管理纱线生产质量,本文采用光电法以解决纱线检测中的关键问题,设计了一种新型纱线疵点检测装置。首先为提高传感器输出信号幅值,通过改变光照角度及镜头与传感器焦合位置两项因素,得到传感器响应信噪比最大时的信号采集方案,并对镜头与传感器进行了合焦结构设计;其次为满足FPGA芯片对输入信号的幅值要求,设计了信号处理电路,对初始信号进行放大、滤波以提高信号幅值并提升信噪比;通过分析疵点尺寸与其对应信号特征,获得疵点特征函数,取得疵点尺寸与处理后信号的对应关系;为实现硬件识别疵点特征信息,利用FPGA芯片设计计时逻辑电路与比较逻辑电路,分别对信号进行脉宽及峰值识别;最后利用NiossⅡI软件开发平台,借助构建的特征函数实现脉宽及峰值的标定及特征值存储及显示并进行模拟信号测试。实测结果表明,论文设计的光电式纱线疵点检测系统能很好的提取出运动过程中纱线表面特征信号的变化,在实验室环境下将系统外界噪声进行有效的抑制。当纱线以30m/min运动,检测系统能有效检测出大于50μm的纱线疵点。
[Abstract]:In the textile industry, textiles in the production process of industrial pipeline will cause yarn surface defects due to many factors, such as raw materials, textile instruments, environmental conditions, etc. Yarn defects are mainly manifested in the sudden change of yarn diameter and the existence of dirty spots on the yarn surface. These defects directly affect the yarn quality. In this paper, a new type of yarn defect detection device is designed by using photoelectric method to solve the key problems in yarn detection. Firstly, in order to improve the output signal amplitude of the sensor, two factors, namely, changing the illumination angle and coking position between the lens and the sensor, are adopted. The signal acquisition scheme of the sensor response to the maximum SNR is obtained, and the focusing structure of the lens and the sensor is designed. Secondly, the signal processing circuit is designed to meet the requirement of the input signal of the FPGA chip. The initial signal is amplified and filtered to improve the signal amplitude and signal to noise ratio. By analyzing the defect size and its corresponding signal characteristics, the defect characteristic function is obtained, and the corresponding relationship between the defect size and the processed signal is obtained. In order to realize the defect characteristic information of hardware, the timing logic circuit and the comparison logic circuit are designed by using FPGA chip to identify the pulse width and peak value of the signal respectively. Finally, the software development platform of Nioss 鈪,
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