基于FPGA的人脸检测系统设计

发布时间：2018-05-24 18:33

本文选题：人脸检测 + FPGA　；参考：《上海交通大学》2008年硕士论文

【摘要】： 人脸识别技术继指纹识别、虹膜识别以及声音识别等生物识别技术之后,以其独特的方便、经济及准确性而越来越受到世人的瞩目。作为人脸识别系统的重要环节—人脸检测,随着研究的深入和应用的扩大,在视频会议、图像检索、出入口控制以及智能人机交互等领域有着重要的应用前景,发展速度异常迅猛。 FPGA的制造技术不断发展,它的功能、应用和可靠性逐渐增加,在各个行业也显现出自身的优势。FPGA允许用户根据自己的需要来建立自己的模块,为用户的升级和改进留下广阔的空间。并且速度更高,密度也更大,其设计方法的灵活性降低了整个系统的开发成本,FPGA设计成为电子自动化设计行业不可缺少的方法。本文从人脸检测算法入手,总结基于FPGA上的嵌入式系统设计方法,使用IBM的Coreconnect挂接自定义模块技术。经过训练分类器、定点化、以及硬件加速等方法后,能够使人脸检测系统在基于Xilinx的Virtex II Pro开发板上平台上,达到实时的检测效果。本文工作和成果可以具体描述如下: 1.算法分析:对于人脸检测算法,首先确保的是检测率的准确性程度。本文所采用的是基于Paul Viola和Michael J.Jones提出的一种基于Adaboost算法的人脸检测方法。算法中较多的是积分图的特征值计算,这便于进一步的硬件设计。同时对检测算法进行耗时分析确定运行速度的瓶颈。 2.软硬件功能划分:这一步考虑市场可以提供的资源状况,又要考虑系统成本、开发时间等诸多因素。Xilinx公司提供的Virtex II Pro开发板,在上面有可以供利用的Power PC处理器、可扩展的存储器、I/O接口、总线及数据通道等,通过分析可以对算法进行细致的划分,实现需要加速的模块。 3.定点化:在Adaboost算法中,需要进行大量的浮点计算。这里采用的方法是直接对数据位进行操作它提取指数和尾数,然后对尾数执行移位操作。 4.改进检测用的级联分类器的训练,提出可以迅速提高分类能力、特征数量大大减小的一种训练方法。 5.最后对系统的整体进行了验证。实验表明,在视频输入输出接入的同时,人脸检测能够达到17fps的检测速度,并且获得了很好的检测率以及较低的误检率。
[Abstract]:Face recognition technology, after biometric identification, iris recognition and sound recognition, has attracted more and more attention with its unique convenience, economy and accuracy. As an important part of face recognition system, face detection, with the deepening of research and application, video conferencing, image retrieval, and entrance Control and intelligent human-machine interaction and other fields have important application prospects, and the speed of development is extremely fast.
The manufacturing technology of FPGA continues to develop, its function, application and reliability have gradually increased, and its advantages in various industries are also showing its own advantages.FPGA allows users to build their own modules according to their needs and leave wide space for the user's upgrading and improvement. And the speed is higher, the density is greater, and the flexibility of its design method is reduced. The development cost of the whole system, FPGA design has become an indispensable method in the electronic automation design industry.
This paper starts with the face detection algorithm, summarizes the design method of embedded system based on FPGA, and uses the Coreconnect connection custom module technology of IBM. After training classifier, fixed-point, and hardware acceleration, it can make the face detection system on the Xilinx based Virtex II Pro development board platform to achieve real-time detection. The work and achievements can be described in detail as follows:
1. algorithm analysis: for the face detection algorithm, the first one is to ensure the accuracy of the detection rate. In this paper, a face detection method based on the Adaboost algorithm based on Paul Viola and Michael J.Jones is adopted. The algorithm is more important for the calculation of the eigenvalue of the integral graph, which is convenient for further hardware design. The method is used for time consuming analysis to determine the bottleneck of the running speed.
2. software and hardware function division: this step takes into consideration the resource situation that the market can provide, but also consider the Virtex II Pro development board provided by.Xilinx company, such as system cost, development time, and so on. There are Power PC processor, extensible memory, I/O interface, bus and data channel which can be used, and can be calculated by analysis. The method is meticulously divided to realize modules that need acceleration.
3. fixed-point: in the Adaboost algorithm, a large number of floating-point calculations are required. The method used here is to operate the data bit directly, extract the index and the end, and then perform the shift operation on the tail number.
4. improve the training of cascade classifier for detection, and propose a training method that can quickly improve classification ability and reduce the number of features greatly.
5. finally, the whole system is verified. The experiment shows that, while the video input and output are connected, the face detection can reach the detection speed of 17fps, and the detection rate is very good and the false detection rate is low.
【学位授予单位】：上海交通大学
【学位级别】：硕士
【学位授予年份】：2008
【分类号】：TP391.41;TN791

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