60GHz硅基毫米波接收机关键技术研究与芯片设计

发布时间：2018-05-25 05:20

本文选题：60 + GHz　；参考：《东南大学》2016年博士论文

【摘要】：随着现代社会对无线通信速率要求的不断提高,在很多场合需要支持数吉比特每秒的传输速率。本世纪以来,各国相继开放了60 GHz附近连续的5-7 GHz带宽用于毫米波短距离高速传输应用,比如无线个域网(WPAN)和无线高清多媒体(wireless HD)等。这极大地激发了学术与工业界对60 GHz毫米波接收机的研究热情,研究成果也不断涌现,而在这些成果中硅基CMOS工艺占据了主导地位。作为一种高集成度及低成本的工艺,CMOS工艺的进步使之在毫米波频段已经具有足够的吸引力。研究60 GHz硅基毫米波接收机对60 GHz通信技术的普及具有特别重要的意义。本文基于65nm CMOS工艺对60 GHz毫米波接收机及其关键电路进行了深入的研究,这些电路包括低噪声放大器、混频器、中频放大器、低通滤波器及可变增益放大器等。本文讨论了CMOS毫米波电路设计中的基本问题。毫米波电路设计区别于吉赫兹电路的特点包括晶体管工作在接近其极限频率、信号波长短造成互连线的分布效应不可忽略、寄生参数对电路工作状态影响大等,这些特点决定了毫米波电路的设计方法与思路。分析了CMOS工艺中包括传输线、电感、电容和晶体管等基本元器件在毫米波频段的特性及在电路设计中的考虑。介绍了用电磁仿真软件HFSS建立片上无源元件模型的过程,通过两种巴伦,即变压器巴伦和Marchand巴伦为例进行了建模与仿真,并分析了它们在阻性与容性负载情况下的特性。本文分析了MOS晶体管在各极端接阻抗时的输入阻抗、跨导与噪声性能,在后续电路设计中可直接引用这些结论。为了获得足够的增益,本文中的毫米波低噪声放大器采用了多级级联的结构,并针对每级的特点进行了优化设计。在毫米波低噪声放大器的第一级采用了共源结构以同时获得较好的输入阻抗匹配与噪声性能,而在后续各级使用共源共栅结构以提高隔离度并获得较高的增益。在本文中,为了改善低噪声放大器的输入匹配、噪声、增益及带宽等性能,采用了输入LC阶梯网络、共源共栅中和电感、栅极反馈电感和级间T型网络等电感性能提升技术。所设计出的低噪声放大器具有17.3 dB的增益和20 GHz的带宽,噪声系数小于5 dB,由此总结出了改进的60 GHz低噪声放大器的公式化设计方法。本文提出了基于电流复用正反馈结构的低噪声放大器,并分析了其稳定性、跨导及噪声性能,测试结果表明其在小于10 mW的功耗时具有14.9 dB的增益和16 GHz的带宽,揭示了其低功耗应用潜力。本文指出了传统Gilbert结构混频器直接应用于基于滑动中频结构的60 GHz接收机中出现的问题,尤其是混频器的中频带宽相对信道带宽较窄。为了有效解决这些问题,本文基于Gilbe rt结构提出了带有LCR串联谐振网络和交叉耦合对的混频器结构。这种结构在Gilbert跨导级采用了电流注入及电感调谐技术,而在负载级加入了并联的LCR串联谐振网络和交叉耦合对引入负电导,以同时扩展带宽和弥补增益的损失。通过对这种结构的增益与带宽进行分析,得到了其增益带宽积随负电导增加而升高的结论,测试结果表明其增益为3 dB时中频带宽为6.5-17.5 GHz,而增益为7.5 dB时具有8 GHz的中频带宽,证明了其同时具有适度增益与宽带特性。本文对应用于60 GHz通信系统的接收链路进行了集成。将整个链路分为两个芯片,芯片1包括低噪声放大器、第一下变频混频器和中频放大器,芯片2包括I/Q正交混频器、除二分频器、低通滤波器及可变增益放大器等。接收机采用了基于滑动中频的二次变频结构,其中第一本振为48 GHz,由24 GHz本振源与倍频器得到,中频位于12 GHz附近,第二本振为正交信号,由24 GHz本振源经除二分频器得到。由于60 GHz通信系统中单信道带宽超过了2 GHz,接收链路中的所有模块都采用了宽带设计技术,本文对这些技术进行了讨论。测试结果表明这两个芯片功能正确,性能良好,证明了CMOS工艺在60GHz通信系统中具有广阔的应用前景。
[Abstract]:With the increasing demand for wireless communication rate in modern society, many occasions need to support the transmission rate of a number of bits per second on many occasions. Since this century, countries have opened 60 GHz continuous 5-7 GHz bandwidth for millimeter wave short distance high-speed transmission applications, such as WPAN and wireless HD It has greatly stimulated the research enthusiasm of the academic and industrial circles on the 60 GHz millimeter wave receiver, and the research results are also emerging. In these results, the silicon based CMOS process occupies the dominant position. As a high integration and low cost process, the progress of the CMOS process has made it attractive at the millimeter wave band. The 60 GHz silicon based millimeter wave receiver is of special significance for the popularization of the 60 GHz communication technology. Based on the 65nm CMOS process, the 60 GHz millimeter wave receiver and its key circuits are deeply studied. These circuits include low noise amplifier, mixer, medium frequency amplifier, low pass filter and variable gain amplifier. The basic problems in the design of CMOS millimeter wave circuit are discussed in this paper. The characteristics of the millimeter wave circuit design differ from the jilt Hertz circuit, including the transistor working near its limit frequency, the short signal wavelength, the distribution effect of the interconnects can not be ignored, the parasitic parameters affect the working state of the circuit and so on. These characteristics determine the millimeter wave circuit. This paper analyzes the characteristics of the basic components including the transmission lines, inductors, capacitors and transistors in the millimeter wave band and the consideration of the design of the circuit in the CMOS process. The process of establishing a passive component model on the chip with the electromagnetic simulation software HFSS is introduced. Two balun, Baren transformer and Marchand Baron are used as an example. In this paper, the input impedance, transconductance and noise performance of MOS transistors at the extreme impedance are analyzed. The results can be directly quoted in the subsequent circuit design. In order to gain sufficient gain, the millimeter wave low noise amplifier in this paper is used in this paper. The multi-stage cascade structure is designed and optimized for the characteristics of each level. The first stage of the millimeter wave low noise amplifier adopts a common source structure to obtain better input impedance matching and noise performance, and the common source grid structure is used at the subsequent levels to improve isolation and gain higher gain. In this paper, the purpose of this paper is to improve the degree of isolation and gain higher gain. The input matching, noise, gain and bandwidth of the good low noise amplifier uses the input LC ladder network, common source co gate neutralization inductance, gate feedback inductor and interstage T network and other inductor performance enhancement techniques. The designed low noise amplifier has 17.3 dB gain and 20 GHz bandwidth, and the noise coefficient is less than 5 dB. An improved formula design method for the 60 GHz low noise amplifier is presented. This paper presents a low noise amplifier based on the current reuse positive feedback structure, and analyses its stability, transconductance and noise performance. The test results show that it has an increase of 14.9 dB and a bandwidth of 16 GHz in less than 10 mW power consumption, and reveals its low power application potential. In this paper, this paper points out that the traditional Gilbert structure mixer is directly applied to the 60 GHz receiver based on the sliding medium frequency structure, especially the middle frequency bandwidth of the mixer is relatively narrow. In order to solve these problems effectively, this paper proposes a mixed LCR series resonant network and a cross coupling pair based on the Gilbe RT structure. This structure uses current injection and inductance tuning at the Gilbert transconductance stage, while a parallel LCR series resonant network and a cross coupling pair are added at the load level to extend the bandwidth and compensate for the loss of the gain. The gain bandwidth is analyzed and the gain bandwidth is obtained by analyzing the gain and bandwidth of this structure. The product increases with the increase of negative conductance. The test results show that the median frequency bandwidth is 6.5-17.5 GHz when the gain is 3 dB, while the gain is 7.5 dB with 8 GHz medium frequency bandwidth. It is proved that it has a moderate gain and broadband characteristics. This paper integrates the link of the 60 GHz communication system and divides the whole link into two. The chip 1 includes a low noise amplifier, a first down conversion mixer and a medium frequency amplifier, and the chip 2 includes a I/Q quadrature mixer, with the exception of a two frequency divider, a low pass filter and a variable gain amplifier, etc. the receiver uses a two frequency conversion structure based on a sliding medium frequency, in which the first oscillator is 48 GHz, and is obtained by a 24 GHz oscillator source and a doubler. The frequency is located near 12 GHz, and second is a quadrature signal, which is obtained by a two divider by the 24 GHz source. Because the single channel bandwidth of the 60 GHz communication system is more than 2 GHz, all the modules in the receiving link have adopted the broadband design technology. This paper discusses these techniques. The test results show that the two chips have the correct functions. It is proved that CMOS technology has broad application prospects in 60GHz communication system.
【学位授予单位】：东南大学
【学位级别】：博士
【学位授予年份】：2016
【分类号】：TN851

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