二维图形加速引擎设计与实现

发布时间:2018-02-02 01:30

  本文关键词: GPU 图形加速 2D图形 水平线 反走样 FPGA 出处:《湖南大学》2013年硕士论文 论文类型:学位论文


【摘要】:在现代图形视频显示系统中,将图形处理任务从CPU中分离出来交由图形处理器(Graphics Processing Unit,GPU)加速处理,已成为整个图形显控系统的基本结构随着计算机硬件水平的提升,以及集成电路制造技术和工艺水平的进步,图形处理器在结构和性能上也有了很大发展,并在航空航海医疗仪器测量仪器移动通信等多个领域的嵌入式终端得到了广泛的应用当前,图形处理器技术主要由一些国际芯片巨头所垄断,国内对于图形处理器的应用和研究相对国际先进水平还有较大差距因此,研究拥有自主知识产权的国产图形处理器,尤其是应用在嵌入式领域的图形处理器具有十分重要的现实意义和实用价值 本文以图形水平线填充的方式,设计了一个2D图形加速引擎,用于实现直线三角形椭圆等基本2D图形的绘制主要工作如下: 首先,研究图形加速系统的基本结构,设计了2D图形加速引擎的架构,详细阐述了各功能模块之间的联系及其实现方法 其次,对于二维图形基本算法进行研究,选择适合于硬件实现的算法,由Verilog硬件描述语言完成各图元模块的代码设计这些算法包括图元预处理单元的裁剪算法一般直线段生成的Bresenham算法直线段反走样的加权区域采样算法椭圆的中点生成算法三角形填充算法和块拷贝等 最后,在Modelsim环境下,对各个设计模块进行功能仿真,验证了设计的正确性对于整个2D图形加速引擎进行了FPGA实物验证,,并对其绘图性能进行了分析验证结果表明,二维图形加速模块能够很好的与其它控制模块兼容,显著提高嵌入式系统的图形处理速度
[Abstract]:In modern graphic video display system, graphics processing task is separated from CPU and handed over to graphics Processing Unit. GPU) accelerated processing has become the basic structure of the whole graphics display and control system with the improvement of the computer hardware level, as well as the progress of IC manufacturing technology and process level. Graphics processor (GPU) has also made great progress in structure and performance, and has been widely used in many fields, such as mobile communication of aviation and navigation medical instruments, measuring instruments, mobile communication and so on. The GPU technology is mainly monopolized by some international chip giants, so there is still a big gap between the application and research of GPU in China compared with the international advanced level. It is of great practical significance and practical value to study the domestic graphics processors with independent intellectual property rights, especially those used in the embedded field. In this paper, a 2D graphics acceleration engine is designed to realize the drawing of basic 2D graphics such as linear triangle ellipse and so on. The main work is as follows: First of all, the basic structure of graphics acceleration system is studied, the structure of 2D graphics acceleration engine is designed, and the relationship between each functional module and its implementation method are described in detail. Secondly, the basic algorithm of two-dimensional graphics is studied, and the algorithm suitable for hardware implementation is selected. Code design of each element module is accomplished by Verilog hardware description language. These algorithms include the clipping algorithm of the element preprocessing unit, the Bresenham algorithm which is generated by the general line segment, and the anti-aliasing algorithm of the line segment. The midpoint generation algorithm of ellipse in weighted region sampling algorithm triangle filling algorithm block copy and so on. Finally, in the Modelsim environment, the functional simulation of each design module, verify the correctness of the design for the entire 2D graphics acceleration engine for the FPGA physical verification. The results show that the 2D graphics acceleration module is compatible with other control modules, and the graphics processing speed of embedded system can be improved significantly.
【学位授予单位】:湖南大学
【学位级别】:硕士
【学位授予年份】:2013
【分类号】:TP391.41

【参考文献】

相关期刊论文 前10条

1 陈敏雅;金旭东;;浅谈计算机图形学与图形图像处理技术[J];长春理工大学学报;2011年01期

2 贾运宁;赵峰;;Bresenham直线光栅化算法的硬件实现方法研究[J];信息技术;2008年09期

3 孔渊;陆虎敏;周坚锋;郭凡;;计算机图形系统发展简述[J];航空电子技术;2006年02期

4 赵京东;;一个椭圆生成算法[J];计算机工程与应用;2006年35期

5 赵俊;张克环;李仁发;;嵌入式通用图形加速芯片的研究与设计[J];计算机工程与应用;2008年26期

6 张波,张焕春,经亚枝;罗盘刻度线反走样快速绘制算法的改进研究[J];计算机辅助设计与图形学学报;2003年01期

7 罗瑜;王钟斐;贾晓云;;基于FPGA的除法器设计[J];计算机与数字工程;2012年05期

8 吴俊杰;杨学军;;非一致Cache体系结构技术综述[J];计算机工程与科学;2011年02期

9 李天保;魏利辉;;高速采样存储中DDR2 SDRAM控制器的设计分析[J];计算机与网络;2010年11期

10 沈强,张波,陈淑珍,孙晓安;计算机图形学反走样技术及实现[J];武汉大学学报(自然科学版);1997年01期



本文编号:1483311

资料下载
论文发表

本文链接:https://www.wllwen.com/falvlunwen/zhishichanquanfa/1483311.html


Copyright(c)文论论文网All Rights Reserved | 网站地图 |

版权申明:资料由用户fd599***提供,本站仅收录摘要或目录,作者需要删除请E-mail邮箱bigeng88@qq.com