应用于ZigBee SoC的低功耗AES IP核设计与实现

发布时间：2018-04-09 09:33

本文选题：无线传感器网络　切入点：ZigBee　出处：《南京航空航天大学》2014年硕士论文

【摘要】：基于ZigBee协议的无线传感网络在环境监控、军事等领域有着广泛的应用，其重要组成部分是节点芯片ZigBee SoC。ZigBee SoC具有非常有限的能耗和软硬件资源，而且由于ZigBee无线传感网络通信的开放性，给网络数据通信及节点自身的数据传输也带来一系列的安全性问题。因此，为ZigBee SoC设计具有自主知识产权的低功耗、小面积的安全AES IP核具有非常重要的意义。论文的主要工作是在课题组研制的具有AMBA总线架构的ZigBee SoC基础上，基于IEEE802.15.4AES CCM*安全体系结构，研究AES中S-盒、轮变换和控制器等主要模块的低功耗设计方法，并设计实现低功耗AES IP核。论文首先研究基于查找表、复合域以及DSE三种不同结构的S-盒性能，并在复合域的S-盒设计中，提出了一种多因子CSE算法来优化S-盒的面积和延时。其次，，在充分研究分析轮变换运算基本流程的基础上，利用DSE方法翻转率较低的优点，结合轮变换T-盒分解方法设计了低功耗轮变换电路；同时，研究了数据总线位宽对轮变换电路性能的影响，设计了一种32比特输入8比特输出混合总线结构，进一步减小了轮变换电路的功耗。最后，论文提出基于查找表的AES控制器设计方法，取代传统的状态机设计方式，降低了AES控制器的功耗。基于Synopsys DC平台与SMIC0.18μm工艺库，对本文优化与设计的低功耗AES加密器进行综合，结果显示，优化后的加密器面积为212464.78μm2，在10MHz的频率下功耗为3.5396mW，比未优化的AES加密器的功耗和面积分别减小了35.5%和17.9%。本文设计的低功耗AES IP核对于解决无线传感网络中能源和空间资源约束问题具有重要意义。
[Abstract]:The wireless sensor network based on ZigBee protocol has extensive application in the fields of environment monitoring , military , etc . Its important part is the node chip ZigBee SoC . The ZigBee SoC has very limited energy consumption and hardware and software resources , and because of the openness of the ZigBee wireless sensor network communication , the data transmission to the network and the data transmission of the node itself also bring a series of security problems . Therefore , it is very important to design the low power consumption and small area security AES IP core with independent intellectual property for the ZigBee SoC design .

On the base of the ZigBee SoC with AMBA bus architecture developed by the research group , the low power consumption design method of the main modules such as S - box , wheel transform and controller in AES is studied based on IEEE802.15 . 4AES CCM * security architecture .
At the same time , the influence of the data bus bit width on the performance of the wheel conversion circuit is studied , a 32 - bit input 8 - bit output hybrid bus structure is designed , and the power consumption of the wheel conversion circuit is further reduced . Finally , the paper proposes an AES controller design method based on a look - up table , which replaces the traditional state machine design mode and reduces the power consumption of the AES controller .

Based on Synopsys DC platform and SMIC0 . 18渭m process library , the optimized and designed low power AES encryptor is integrated . The results show that the optimized encryptor area is 2124.78渭m ~ 2 , the power dissipation is 3.5396mW at 10MHz , and the power consumption and area of the unoptimized AES encryptor are reduced by 35 . 5 % and 17.9 % respectively . The low power consumption AES IP core designed in this paper is of great significance to solve the problem of energy and space resource constraint in wireless sensor networks .

【学位授予单位】：南京航空航天大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN47;TN918.4

【共引文献】