AVS2视频解码器在DSP上的优化实现

发布时间：2018-06-23 04:27

本文选题：AVS + 解码　；参考：《天津大学》2014年硕士论文

【摘要】：随着多媒体技术的发展，视频编解码作为多媒体技术的基础自80年代以来也得到快速的发展，，国际上陆续制定了MPEG和H.26x两大系列视频压缩标准。AVS作为我国具有自主知识产权的音视频标准，拥有诸多的优势，其框架、性能与H.264相当，但是复杂度却远远低于H.264。DSP作为一种专用于数字信号处理的微处理器，特别适合进行音视频编解码。本文主要基于TMS320C6678硬件平台，实现AVS2视频标准解码器，并对其进行优化，最终实现标清的实时解码。论文的主要研究内容如下：首先，阐述了视频压缩的必要性以及可能性。详细介绍了国际视频标准和国内视频标准的发展历程。并将AVS与H.264从变换量化、帧内预测、帧间预测、熵编码、环路滤波五个方面进行了详细的对比，说明我国视频标准制定的必要性以及优势。其次，对视频解码器各个关键技术做了详细的分析，对本文使用的硬件平台进行了详细的介绍，包括发展历程、特点、整体架构、C66x核的组成、数据通道、片内存储器、指令集、EDMA等，为后续将视频解码器移植到TMS320C6678上并对其优化打下了基础。然后对开发工具CCS5.3和DSP程序开发与优化流程做了简单的介绍。最后，在分析视频解码器和TMS320C6678性能、资源的基础上，将其移植到DSP上。移植过程中主要做了如下工作：规范数据结构、实时支持库的处理、删除冗余的功能、删除或修改DSP平台不支持的函数等。之后，从C语言级、算法级、DSP平台三个方面对其进行了优化。在C语言级方面，主要对循环结构、函数的调用、数据结构等方面进行了优化；在算法级，主要针对代码整体结构、全零块的处理、运动补偿进行了优化；在DSP平台方面，主要从编译器、CACHE机制、存储空间、EDMA、内联函数等方面进行了优化。最终实现了解码器对D1（720×576）的实时解码。最终使用多个测试序列对解码器进行测验，实验结果表明，本文基于TMS320C6678实现的AVS2视频解码器能够正确解码，且对D1视频码流的解码速度达到了每秒30帧，满足了实时的要求。
[Abstract]:With the development of multimedia technology, video codec, as the basis of multimedia technology, has been developing rapidly since 1980s. Two series of video compression standards, MPEG and H.26x, have been developed in the world. AVS, as an audio and video standard with independent intellectual property rights in China, has many advantages, and its framework and performance are comparable to that of H.264. However, the complexity of H.264 DSP is much lower than that of H.264 DSP, which is especially suitable for audio and video coding and decoding. This paper mainly based on TMS320C6678 hardware platform, implements AVS2 video standard decoder, and optimizes it, finally realizes the real-time decoding of the standard. The main contents of this paper are as follows: firstly, the necessity and possibility of video compression are discussed. The development course of international video standard and domestic video standard is introduced in detail. In addition, AVS and H.264 are compared in five aspects: transform quantization, intra prediction, inter frame prediction, entropy coding and loop filtering. Secondly, the key technologies of video decoder are analyzed in detail, and the hardware platform used in this paper is introduced in detail, including development history, characteristics, composition of C66x core, data channel, on-chip memory, and so on. Instruction set EDMA and so on have laid the foundation for transplanting video decoder to TMS320C6678 and optimizing it. Then the development tool CCS 5.3 and DSP program development and optimization process are briefly introduced. Finally, on the basis of analyzing the performance of video decoder and TMS320C6678, it is transplanted to DSP. The main work in the process of transplanting is as follows: standardizing data structure, processing real-time support library, deleting redundant functions, deleting or modifying functions not supported by DSP platform, and so on. Then, it is optimized from three aspects: C language level, algorithm level and DSP platform. In C language level, the loop structure, function call, data structure and so on are optimized; at the algorithm level, the whole code structure, zero block processing, motion compensation are optimized; in DSP platform, It mainly optimizes the compiler's cache mechanism, memory space EDMA, inline function and so on. Finally, the decoding of D 1 (720 脳 576) is realized in real time. Finally, several test sequences are used to test the decoder. The experimental results show that the AVS2 video decoder based on TMS320C6678 can decode correctly, and the decoding speed of D1 video stream reaches 30 frames per second, which meets the real-time requirements.
【学位授予单位】：天津大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN919.81

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