多协议UHF RFID基带信号IP核的设计与实现
[Abstract]:With the progress and development of science and technology, convenience has become the first concern of people to improve their living standards. Thus, a variety of emerging industries,. RFID (Radio-Frequency Identification technology is one of them, namely radio frequency identification (RFID) technology. Radio-frequency signal is the technology of non-contact communication and object recognition. Since the 1990s, RFID technology has developed rapidly, the technology is becoming more and more complex, the application scope is more and more extensive. UHF RFID refers to the RFID system whose working frequency is within the range of 860MHz-960MHz frequency. This RFID system has the advantages of long reading and writing distance, fast reading and writing speed, low cost of electronic tags, and the ability to inventory multiple electronic tags simultaneously. Has gradually taken a place in the RFID world. With the deepening of our understanding of UHF RFID, our country has begun to pay attention to the research and application of UHF RFID system, especially UHF RFID reader and writer, and has made great efforts to popularize it. However, due to the relatively late start and backward technology level, our industry is still in the catch-up stage in the research and development and application of UHF RFID, and the key technologies such as the design of UHF read-write chip are still far from mature. Based on this, a low cost, clippable and reusable multi-protocol UHF RFID baseband signal IP core is proposed. The ultimate goal is to develop an ultra-high frequency (RFID) technology with independent intellectual property rights. The reader of UHF RFID system stipulated by ISO/IEC18000-6B and ISO/IEC18000-6C protocol specification is developed. This topic is a key part of the design of the baseband SoC of the multi-protocol UHF RFID reader and writer, and focuses on the key technology of developing the protocol processing part of the UHF RFID reader. After modular design and functional simulation of the whole IP core by using verilog language, it is necessary to implement the design verification of IP core on the DE2-115 development board of Altera Company, the hardware platform, and cooperate with the RF board. Finally, it realizes the operation of electronic label which accords with ISO/IEC18000-6B and ISO/IEC18000-6C protocols.
【学位授予单位】:山东大学
【学位级别】:硕士
【学位授予年份】:2013
【分类号】:TP391.44
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