基于以太网的音频远程监控系统设计
发布时间：2019-02-19 14:51
【摘要】：随着信息技术以及网络技术的飞速发展，因特网在音频视频、智能交通、工业控制以及航天测控领域已经有了越来越广泛的应用。本文基于嵌入式系统设计，以FPGA为核心设计了一种音频远程监控系统，实现了音频数据的前端处理，包括模数转换以及音频数据压缩编码的动作，同时在FPGA完成了因特网TCP/IP协议以及MAC控制器的设计与实现，最终将依据TCP/IP协议的规范打包完成的音频数据包通过互联网传送至相应的监控平台。 本系统设计中，采用了ADPCM编码算法实现了在FPGA内音频数据的压缩编码过程。自适应差分脉冲编码调制（ADPCM）采用自适应量化方法和自适应预测方法，对PCM(脉冲编码调制)语音信号进行再压缩，，实现了一种有效的语音信号波形编码压缩方案。 传统的基于CPU软件实现TCP/IP协议的处理方式，无论是在处理速度，还是稳定性方面，都无法与基于硬件的实现相比，而且基于软件的实现会占用大量的CPU资源、浪费存储空间。当网络通信的速度达到吉比特数量级时，这种基于CPU软件实现TCP/IP协议的处理方式就很难完成要求。其成本与稳定性将会大大的制约这种处理方式。通过硬件逻辑实现的TCP/IP协议，能够大大提高数据的传输处理能力。而FPGA(Field Programmable Gate Array，即现场可编程门阵列)内部具有丰富的可编程逻辑资源，通过硬件描述语言Verilog或VHDL，能够在FPGA中实现各种复杂的硬件逻辑。通过FPGA实现的TCP/IP协议模块，由于它是功能专用的硬件模块，其处理速度非常高，数据通信速度能达到10G以上，这是传统的基于CPU软件实现方案所很难达到的。 现在，FPGA开发工具种类繁多、智能化高、功能强大，应用各种工具可以完成从输入、综合、实现到配置芯片等一系列功能。而且还有很多工具可以完成对设计的仿真、优化、约束、在线调试等功能，这使FPGA的开发周期比较短，产品上市时间快。而且随着FPGA的不断发展，其规模不断加大，成本不断降低，并且还能将各种功能模块做成具有知识产权的IP核，这样非常方便功能模块的移植。
[Abstract]:With the rapid development of information technology and network technology, the Internet has been more and more widely used in the fields of audio and video, intelligent transportation, industrial control and aerospace measurement and control. Based on the embedded system design, this paper designs an audio remote monitoring system with FPGA as the core, which realizes the front-end processing of audio data, including the action of analog-to-digital conversion and audio data compression and coding. At the same time, the design and implementation of the Internet TCP/IP protocol and the MAC controller are completed in FPGA. Finally, the audio packets packaged according to the standard of TCP/IP protocol are transmitted to the corresponding monitoring platform via the Internet. In the design of this system, ADPCM coding algorithm is used to realize the compression and coding process of audio data in FPGA. Adaptive differential pulse coding modulation (ADPCM) uses adaptive quantization method and adaptive prediction method to recompress the speech signal of PCM (Pulse coded Modulation) and realize an effective scheme of waveform coding compression of speech signal. The traditional TCP/IP protocol based on CPU software can not be compared with the hardware implementation in terms of processing speed and stability, and the implementation based on software will consume a lot of CPU resources. Waste storage space. When the speed of network communication reaches the order of gigabit, it is difficult to implement the TCP/IP protocol based on CPU software. Its cost and stability will greatly constrain this approach. The TCP/IP protocol realized by hardware logic can greatly improve the ability of data transmission and processing. FPGA (Field Programmable Gate Array, (Field Programmable Gate Array) has abundant programmable logic resources, and it can realize various complex hardware logic in FPGA by hardware description language Verilog or VHDL,. The TCP/IP protocol module realized by FPGA, because it is a special hardware module, its processing speed is very high, and the data communication speed can reach more than 10G, which is very difficult to achieve by the traditional software implementation scheme based on CPU. At present, FPGA development tools are various, intelligent and powerful. The application of various tools can complete a series of functions from input, synthesis, realization to configuration chip. There are also many tools to complete the design of simulation, optimization, constraints, on-line debugging and other functions, which makes the FPGA development cycle is relatively short, product launch time is fast. With the continuous development of FPGA, its scale is increasing, the cost is decreasing, and all kinds of functional modules can be made into IP cores with intellectual property rights, which is very convenient for the transplantation of functional modules.
【学位授予单位】：成都理工大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TN912.3;TN791
[Abstract]:With the rapid development of information technology and network technology, the Internet has been more and more widely used in the fields of audio and video, intelligent transportation, industrial control and aerospace measurement and control. Based on the embedded system design, this paper designs an audio remote monitoring system with FPGA as the core, which realizes the front-end processing of audio data, including the action of analog-to-digital conversion and audio data compression and coding. At the same time, the design and implementation of the Internet TCP/IP protocol and the MAC controller are completed in FPGA. Finally, the audio packets packaged according to the standard of TCP/IP protocol are transmitted to the corresponding monitoring platform via the Internet. In the design of this system, ADPCM coding algorithm is used to realize the compression and coding process of audio data in FPGA. Adaptive differential pulse coding modulation (ADPCM) uses adaptive quantization method and adaptive prediction method to recompress the speech signal of PCM (Pulse coded Modulation) and realize an effective scheme of waveform coding compression of speech signal. The traditional TCP/IP protocol based on CPU software can not be compared with the hardware implementation in terms of processing speed and stability, and the implementation based on software will consume a lot of CPU resources. Waste storage space. When the speed of network communication reaches the order of gigabit, it is difficult to implement the TCP/IP protocol based on CPU software. Its cost and stability will greatly constrain this approach. The TCP/IP protocol realized by hardware logic can greatly improve the ability of data transmission and processing. FPGA (Field Programmable Gate Array, (Field Programmable Gate Array) has abundant programmable logic resources, and it can realize various complex hardware logic in FPGA by hardware description language Verilog or VHDL,. The TCP/IP protocol module realized by FPGA, because it is a special hardware module, its processing speed is very high, and the data communication speed can reach more than 10G, which is very difficult to achieve by the traditional software implementation scheme based on CPU. At present, FPGA development tools are various, intelligent and powerful. The application of various tools can complete a series of functions from input, synthesis, realization to configuration chip. There are also many tools to complete the design of simulation, optimization, constraints, on-line debugging and other functions, which makes the FPGA development cycle is relatively short, product launch time is fast. With the continuous development of FPGA, its scale is increasing, the cost is decreasing, and all kinds of functional modules can be made into IP cores with intellectual property rights, which is very convenient for the transplantation of functional modules.
【学位授予单位】：成都理工大学
【学位级别】：硕士
【学位授予年份】：2013
【分类号】：TN912.3;TN791
【参考文献】
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