溶胶凝胶法制备Hf基高k栅介质薄膜及其器件性能研究

发布时间：2018-03-24 16:28

  本文选题：Hf基高介电材料　切入点：溶胶凝胶法　出处：《安徽大学》2017年硕士论文

【摘要】：随着超大规模集成电路的发展,MOSFET器件的特征尺寸不断缩小,传统栅介质SiO_2薄膜由于它较低的介电常数(～3.9)已经达到了它的物理极限。此时,由于量子遂穿效应,使得栅介质层的漏电流急剧增加,导致了器件的可靠性和稳定性急剧下降,严重影响器件的使用寿命。近年来,Hf基高介电常数材料由于具有较高的k值、与Si衬底具有较好的热稳定性和优异界面、较大的禁带宽度以及较大价带和导带偏移,成为替代传统Si02栅介质理想的候选材料,引起了越来越多关注和研究。薄膜晶体管(TFT)器件作为平板显示器的核心原件,对提高平板显示器的性能起到举足轻重的作用。而TFT器件的栅绝缘层性能的好坏直接影响着器件的性能。采用高介电常数的Hf基高介电常数材料代替传统的SiO_2栅介质,可以有效降低器件的漏电流、减小阈值电压,可以提高栅极对源漏极之间电流的调控作用。目前Hf基高介电薄膜材料的制备方法也有很多,原子层沉积(ALD)是目前业界制备栅介质的主流技术,但ALD技术需要高真空环境和薄膜生长速率非常慢,不利于大规模的现代化生产。而利用溶胶凝胶法制备Hf基高介电薄膜材料,其成本较低、操作简单和材料成分容易控制。因此,利用溶胶凝胶法制备Hf基高k栅介质薄膜和器件研究对集成电路的发展具有重要意义。溶胶凝胶法由于使用溶液制备薄膜,所以必须进行热处理进行固化,而热处理的温度对薄膜的质量有着直接影响。基于前期报道可知,大部分方法制备的铪基栅介质由于低晶化温度、不太高的介电常数,及高温下恶化的界面特性阻碍其在MOSFET和TFT中的继续应用。基于这些棘手问题,本论文采取Ti、Al等元素掺杂有效改善Hf02薄膜的物性,调控MOS和TFT器件性能。1、利用溶胶凝胶法制备了 HfO_2薄膜,探究了不同退火温度对其结构、光学和电学性质的影响。实验结果表明:不同的退火温度下HfO_2薄膜具有不同的晶体结构,同时退火温度有效调控了 HfO_2薄膜的光学带隙;电学测试分析表明400℃退火的样品显示了优化的电学性能。2、利用溶胶凝胶法制备了 Ti掺杂的HfO_2栅介质薄膜,研究了不同的烘烤温度对薄膜结构、光学和电学性能的影响。烘烤温度在200℃时,薄膜的电学性能最好,其介电常数相对于HfO_2薄膜有明显增加。3、利用溶胶凝胶法制备了 Al掺杂的Hf02栅介质薄膜,探究了不同的退火温度对薄膜光学和电学性能的影响。电学测试表明:400℃退火的样品显示了优化的电学性能,且漏电流有明显抑制。4、利用溶胶凝胶法制备了 InZnO/HfAlOx薄膜晶体管,通过改变HfAlOx薄膜的退火温度和绝缘层的厚度,研究绝缘层对薄膜晶体管性能的影响。器件测试表明:当HfAlOx薄膜在60℃退火温度时,InZnO/HfAlOx薄膜晶体管展现出较好的性能。
[Abstract]:With the development of VLSI, the characteristic size of MOSFET devices has been shrinking, and the traditional gate dielectric SiO_2 film has reached its physical limit due to its low dielectric constant of 3.9. at this time, due to quantum tunneling effect, The leakage current of the gate dielectric layer increases sharply, which leads to a sharp decrease in the reliability and stability of the device, which seriously affects the service life of the device. In recent years, the high dielectric constant material based on HF has a high k value. It has good thermal stability, excellent interface with Si substrate, large bandgap, large valence band and conduction band offset, and is an ideal candidate material to replace the traditional Si02 gate dielectric. TFT device is the core part of flat panel display. It plays an important role in improving the performance of flat panel display. The performance of gate insulation layer of TFT device directly affects the performance of the device. The high dielectric constant material based on HF is used to replace the traditional SiO_2 gate dielectric. It can effectively reduce the leakage current of the device, reduce the threshold voltage and improve the effect of the gate on the current between the source and drain. At present, there are many methods for the preparation of HF based high dielectric thin films. Atomic layer deposition (ALD) is the main technology for preparing gate dielectric in industry at present, but ALD technology needs high vacuum environment and thin film growth rate is very slow, which is not conducive to large-scale modern production, and the preparation of HF based high dielectric thin films by sol-gel method. Therefore, the preparation of HF based high-k gate dielectric thin films and devices by sol-gel method is of great significance to the development of integrated circuits. Therefore, heat treatment is necessary for curing, and the temperature of heat treatment has a direct effect on the quality of the film. Based on previous reports, it can be seen that most of the Hafnium based gate dielectric prepared by the method is not too high dielectric constant due to its low crystallization temperature. And the deterioration of interfacial properties at high temperature hinders its continued application in MOSFET and TFT. Based on these thorny problems, the physical properties of Hf02 thin films are effectively improved by doping TiOAl and other elements in this paper. The properties of MOS and TFT devices were regulated. HfO_2 thin films were prepared by sol-gel method. The structure of HfO_2 films was investigated at different annealing temperatures. Experimental results show that HfO_2 thin films have different crystal structures at different annealing temperatures and the optical band gap of HfO_2 films is effectively controlled by annealing temperature. Electrical analysis showed that the annealed samples at 400 鈩，

本文编号：1659100