基于FPGA的CMOS高清相机采集与传输系统设计

发布时间：2018-11-18 19:17

【摘要】：随着集成电路技术水平的提高,使得CMOS图像传感器有了飞跃式发展。尤其是CMOS内部可集成A/D转换器、电平转换电路的特性,使其直接输出数字信号。高清、高帧频数字相机,可极大程度地提升图像数据传输速率,但同时也带给硬件电路设计极大的挑战。本文结合实际工程需求,以降低硬件设计难度、简化硬件电路为目的,设计一款基于FPGA的CMOS高清相机数据采集与传输系统,该相机在200Mbps的高速传输过程中可以拍到分辨率为2048×1088的高清图像,有利于对瞬态现象的抓拍取证。本次设计的采集与传输系统主要分为三大部分:可见光区的目标图像采集单元、控制与处理单元、高速数据传输单元。针对采集单元与控制单元的接口处的电平转换电路,通过采用VHDL硬件描述语言将CMOS输出的LVDS电平转换为TTL电平,实现了软件设计代替硬件电路设计;针对高速传输问题,采用VHDL语言在传输过程中对图像传输通道进行时序设计,使之能够多通道输出,从而实现高速传输功能;针对数据在高速传输中能否保证采样到正确字节,本文利用FPGA芯片的现场可编程功能,设计并实现了图像数据采集的字对齐和位对齐,极大地提高了数据采样的完整性。最后通过板级测试及成像实验验证了硬件电路在软件下的逻辑功能,说明本次设计的采集与传输系统可以实现在较高帧频230fps下采集到高清图像,分辨率为2048×1088,满足项目需求。
[Abstract]:With the improvement of integrated circuit technology, CMOS image sensor has been developed by leaps and bounds. In particular, the characteristics of the integrated A / D converter and the level conversion circuit make the CMOS output digital signal directly. High definition, high frame rate digital camera can greatly improve the speed of image data transmission, but it also brings great challenges to hardware circuit design. In order to reduce the difficulty of hardware design and simplify the hardware circuit, a data acquisition and transmission system for CMOS high-definition camera based on FPGA is designed in this paper. The camera can capture high-definition images with resolution of 2048 脳 1088 during the high speed transmission of 200Mbps, which is beneficial to the capture of transient phenomena. The system is divided into three parts: the target image acquisition unit, the control and processing unit, and the high-speed data transmission unit. Aiming at the level conversion circuit of the interface between the acquisition unit and the control unit, the LVDS level of the CMOS output is converted to the TTL level by using VHDL hardware description language, and the software design is realized instead of the hardware circuit design. Aiming at the problem of high speed transmission, VHDL language is used to design the timing of image transmission channel in order to realize the function of high speed transmission. Aiming at whether the data can be sampled to the correct bytes in high speed transmission, this paper designs and implements the word alignment and bit alignment of image data acquisition by using the field programmable function of FPGA chip, which greatly improves the integrity of data sampling. Finally, the logic function of the hardware circuit under the software is verified by the board-level test and the imaging experiment. It shows that the acquisition and transmission system designed in this paper can acquire high-definition images at a higher frame rate 230fps, and the resolution is 2048 脳 1088, which meets the requirements of the project.
【学位授予单位】：西安建筑科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP274.2;TB852.1

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