半有源高频RFID标签芯片模拟前端的研究和设计

发布时间：2018-05-23 13:16

本文选题：高频 + 射频识别　；参考：《华中科技大学》2014年硕士论文

【摘要】：近年来，射频识别（Radio Frequency Identification-RFID）技术在供应链管理、公共交通、零售业、物流跟踪和门禁系统等领域中有着广泛的应用。随着物联网技术和无线传感网络技术的发展，集成传感器的RFID标签芯片成为了RFID技术发展趋势。半有源标签由于自身携带电池，突破了功耗瓶颈，为传感器、高强度的安全算法等功能在射频系统中的应用提供了可能。因此，半有源标签在RFID标签芯片功能性增强的趋势下有着巨大的应用前景。本文针对高频半有源RFID标签芯片模拟前端系统和关键模块进行了研究和实现。首先，本文阐述了半有源标签芯片工作原理，并从识读距离和使用寿命两个方面分析了半有源标签芯片的关键性能，同时构建了高频半有源标签芯片模拟前端的系统架构。其次，本文对高频半有源RFID标签芯片模拟前端的关键模块进行了研究和设计，其中阐明了NMOS栅交叉全波整流电路的输出电压与其损耗来源，介绍并分析了目前常用的时序检测唤醒电路和能量检测唤醒电路，在解调理论分析的基础上构建了适用于高频半有源RFID标签芯片的10%ASK解调和100%解调电路，，同时研究了低成本的副载波返回调制的机理和实现方式。最后，本文基于华虹NEC0.13μm1P4M CMOS工艺优化并实现了适用于ISO/IEC14443Type A协议的高频半有源RFID标签芯片的模拟前端电路。仿真结果显示，该模拟前端实现了唤醒电路约100pW的极低休眠功耗和相对于无源模拟前端更远的识读距离，更大的带载能力。该模拟前端芯片面积为416μm×472μm，投片后芯片与基于FPGA的数字基带进行测试，采用ASK100%调制方式，能与读写器进行正常通信，标签返回读写器信号调制深度达16.4%，大大高于读写器识别要求。测试表明该模拟前端可应用于高频半有源RFID标签整体芯片中。
[Abstract]:In recent years, Radio Frequency Identification-RFIDation-RFID technology has been widely used in supply chain management, public transport, retail, logistics tracking and access control systems. With the development of Internet of things (IoT) and wireless sensor network (WSN) technology, RFID tag chip integrated with sensor has become the trend of RFID technology. The semi-active tag has broken through the bottleneck of power consumption because of carrying battery itself, which provides the possibility for the application of sensor, high-intensity security algorithm and other functions in RF system. Therefore, semi-active tag has a great application prospect in the trend of RFID tag chip functionality enhancement. In this paper, the analog front end system and key modules of high frequency semi-active RFID tag chip are studied and implemented. Firstly, this paper describes the working principle of semi-active tag chip, and analyzes the key performance of semi-active tag chip from the aspects of reading distance and service life. At the same time, the system architecture of high-frequency semi-active tag chip analog front-end is constructed. Secondly, this paper studies and designs the key modules of the analog front-end of the high-frequency semi-active RFID tag chip, in which the output voltage and the loss source of the NMOS gate cross-full-wave rectifier circuit are clarified. This paper introduces and analyzes the current time sequence detection wake-up circuit and energy detection wake-up circuit. Based on the analysis of demodulation theory, the 10%ASK demodulation circuit and 100% demodulation circuit suitable for high frequency semi-active RFID tag chip are constructed. At the same time, the mechanism and implementation of low cost subcarrier return modulation are studied. Finally, based on Huahong NEC0.13 渭 m1P4M CMOS technology, the analog front-end circuit of high-frequency semi-active RFID tag chip suitable for ISO/IEC14443Type A protocol is optimized and implemented. The simulation results show that the analog front-end realizes the very low dormant power consumption of the arousal circuit about 100pW, the longer reading distance and the larger load capacity compared with the passive analog front-end. The area of the analog front-end chip is 416 渭 m 脳 472 渭 m. The chip is tested with the digital baseband based on FPGA. The ASK100% modulation mode can communicate with the reader normally, and the modulation depth of the label return reader signal reaches 16.4g, which is much higher than the recognition requirement of the reader. The test shows that the analog front end can be used in the whole chip of high frequency semi-active RFID tag.
【学位授予单位】：华中科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP391.44

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