数字三维示波器中DDR3存储模块的硬件设计与实现

发布时间：2018-06-18 18:33

本文选题：数字三维示波器 + DDR3　；参考：《电子科技大学》2016年硕士论文

【摘要】：随着信号的频率和复杂性逐渐增加,更大的存储深度以及更高的数据存取和处理速率是当代示波器提高对异常信号捕获能力的重要手段。作为示波器的主要存储模块,DDR3 SDRAM设计的好坏直接影响到前端的数据采集模块(ADC)和后端的波形处理模块的工作效率。本课题以数字三维示波器为硬件设计平台,通过DDR3存储模块的硬件设计,实现了深存储下的分段录制与三维映射功能。本课题采用FPGA+DDR3的经典存储架构,利用DDR3的大容量与高存取速率,使得数字三维示波器在深存储模式下依然具有高速的数据处理与响应能力。论文的主要研究内容包括DDR3及其外围电路的设计、电源分配网络的设计、信号和电源完整性的设计、深存储功能的设计与实现等。在DDR3模块的硬件设计中,通过MIG核简化设计流程,采用4:1的数据传输模式,使得DDR3存储模块的读写速度最高可达6.4GB/s,提高了数据的存取效率。在硬件系统设计方面,通过去耦、隔离、阻抗匹配等各种手段,降低系统噪声,提高信号和电源完整性,并达到了国家电磁兼容性要求中的电磁辐射标准(GB4824,频率:30~1000MHz)。在DDR3的深存储功能设计方面,改进了以往单一的录制和映射模块,通过分段录制和多幅波形集中映射的方式,不仅减小了死区时间,还大大提高了数字三维示波器对异常信号的捕获能力。除此之外,本课题还重点探究了DDR3存储模块设计中的重难点(高速硬件设计、深存储中的关键技术等),最终完成了数字三维示波器中DDR3存储模块的硬件设计,实现了深存储下的分段录制、回放和三维映射等功能,以及最大可变存储深度达到280Mpts,波形捕获率超过200,000wfms/s。
[Abstract]:With the increasing of the frequency and complexity of the signal, greater storage depth and higher data access and processing rate are the important means for the modern oscilloscope to improve its ability to capture abnormal signals. As the main storage module of oscilloscope, the design of DDR3 SDRAM directly affects the efficiency of the front-end data acquisition module (ADC) and the back-end waveform processing module. In this paper, the digital 3D oscilloscope is used as the hardware design platform. Through the hardware design of DDR3 storage module, the function of segmented recording and 3D mapping under deep storage is realized. In this paper, the classical storage architecture of FPGA DDR3 is adopted, and the large capacity and high access rate of DDR3 make the digital 3D oscilloscope still have high speed data processing and response ability in deep storage mode. The main contents of this paper include the design of DDR3 and its peripheral circuits, the design of power distribution network, the design of signal and power supply integrity, and the design and implementation of deep storage function. In the hardware design of DDR3 module, the design flow is simplified by MIG core, and the 4:1 data transmission mode is adopted. The reading and writing speed of DDR3 storage module is up to 6.4 GB / s, and the data access efficiency is improved. In the aspect of hardware system design, by means of decoupling, isolation, impedance matching and so on, the noise of the system is reduced, the signal and power integrity are improved, and the electromagnetic radiation standard GB4824 and the frequency of 1: 30 ~ 1000MHz are achieved. In the design of DDR3 deep storage function, the former single recording and mapping module is improved. The dead zone time is not only reduced by segmental recording and multi-waveform centralized mapping, but also by the design of DDR3 deep storage function. It also greatly improves the ability of the digital three-dimensional oscilloscope to capture the abnormal signal. In addition, this subject also focuses on the design of DDR3 storage module, including the high speed hardware design, the key technology of deep storage and so on. Finally, the hardware design of DDR3 storage module in the digital 3D oscilloscope is completed. The functions of segment recording, playback and 3D mapping under deep storage are realized, and the maximum variable storage depth reaches 280 Mpts.The waveform capture rate is over 200000 wfms / s.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TM935.3

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