应用于传感器标签的线性稳压器设计

发布时间：2018-05-28 02:05

本文选题：RFID + 传感器电子标签　；参考：《复旦大学》2014年硕士论文

【摘要】：近年来,电子标签与传感器的结合成为射频识别(RFID)技术的研究热点之一。传感器标签前端中的模拟模块主要包含带隙基准、电源管理和上下电复位电路(POR)模块。其中低压差线性稳压器(LDO)结构简单、面积小、功耗低,适合作为传感器标签芯片中电源管理模块,为电子标签和传感器供电。设计此类线性稳压器需要满足宽范围低电源电压、低功耗条件下工作,因为无源标签的能量会随着读写距离的变化而变化,此外需要优化LDO的电源电压抑制(PSR)能力以及环路稳定性。本文从低压低功耗的方向对传感器前端中的模拟模块进行了研究,设计了一款符合传感器电子标签应用的LDO。文中重点设计了其中的Sub-1-V带隙基准(Bandgap)模块,LDO模块。针对应用需求设计了POR模块。本文以应用背景为切入点,研究分析了传感器标签前端中的模拟电路设计难点,并制订了可行的设计指标(SPEC)。其次介绍了LDO、Bandgap、POR电路工作原理,并针对每个模块的设计指标做优化设计,得到了最终的折衷方案。本文通过改进低压运放(OTA)电路结构,从而满足了超低压带隙基准的电路设计。在0.13um标准CMOS工艺条件下,带隙基准的工作电压范围在全工艺角下是0.75V-1.6V,输出参考电压为600mV,低频处的PSR约为64.5dB,在13.56MHz处的PSR约为60dB,静态电流为2.5uA；文中设计的LDO(不包含Bandgap)的静态功耗约为2.5uA,低频处的PSR约为55dB,13.56MHz处PSR为60dB。POR复位延迟时间约为50us,静态功耗小于200nA。文中的设计是借助cadence的spectre仿真器仿真,仿真结果表明符合设计预期,电路最终通过版图后仿。
[Abstract]:In recent years, the combination of electronic tags and sensors has become one of the research hotspots in RFID technology. The analog module in the front end of sensor label mainly includes bandgap reference, power management and power reset circuit (POR) module. The low voltage difference linear regulator (LDO) is simple in structure, small in area and low in power consumption. It is suitable for the power management module in the sensor tag chip and the power supply for the electronic tag and sensor. The design of this type of linear regulator requires a wide range of low power supply voltages and low power consumption because the energy of the passive label varies with the read / write distance. In addition, the power supply voltage suppression capacity and loop stability of LDO need to be optimized. In this paper, the analog module in the front end of the sensor is studied in the direction of low voltage and low power consumption, and a LDO is designed for the sensor tag application. In this paper, the Sub-1-V bandgap reference module is designed. The POR module is designed to meet the application requirements. In this paper, based on the application background, the difficulties of analog circuit design in the front end of sensor label are studied and analyzed, and the feasible design index is worked out. Secondly, the working principle of LDO Bandgapa POR circuit is introduced, and the design index of each module is optimized, and the final compromise scheme is obtained. In this paper, the circuit design of ultra low voltage bandgap reference is satisfied by improving the circuit structure of low voltage operational amplifier (OTA). Under the condition of 0.13um standard CMOS process, The working voltage range of bandgap reference is 0.75V-1.6V, the output reference voltage is 600mV, the PSR at low frequency is about 64.5 dB, the PSR at 13.56MHz is about 60dB, and the static current is 2.5uA. The PSR is about 55 dB ~ 13.56 MHz PSR is 60dB.POR reset delay time is about 50 us. the static power consumption is less than 200 na. The design of this paper is based on the simulation of spectre simulator of cadence. The simulation results show that the circuit meets the design expectations and the circuit is simulated after layout.
【学位授予单位】：复旦大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM44

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