基于谷电流模式和COT控制的降压型DC-DC转换器的设计

发布时间：2018-06-02 09:11

本文选题：电源管理芯片 + 恒定导通时间　；参考：《西安电子科技大学》2014年硕士论文

【摘要】：随着电子技术的飞速发展,各式各样的电子产品在我们的日常生活中已随处可见,电源管理芯片作为电子产品的心脏,其性能的好坏直接决定着电子产品的续航时间和寿命。所以为了提高电子产品的性能,电源管理类芯片的研究与发展成为现代科技发展的一个重要课题。电源管理类芯片正在向着低功耗,低成本,面积小,高转换效率的方向发展。在电源管理类芯片中,DC-DC开关型电源具有功耗低,转换效率高,成本低的优点,但是难以将整个系统集成在一个芯片中。近年来DC-DC开关型电源得到了广泛使用,特别是在大功率的使用场合。本论文主要研究在BCD工艺下降压型DC-DC电源管理芯片的设计、仿真与实现。论文从电特性指标开始,到电路设计,再到电路性能仿真,设计了一款宽电压输入范围,宽电压输出范围和大电流输出的Buck DC-DC电源管理类芯片。论文首先介绍了电源管理芯片的发展概况,以及电源芯片的研究意义,然后介绍了三种DC-DC(Buck,Boost和Buck/Boost)的拓扑结构,并详细介绍了降压型DC-DC的基本工作原理,电压模控制与电流模控制的区别,以及连续导通模式和不连续导通模式的工作原理,三种不同的降压型DC-DC调制方式(脉冲宽度调制方式,脉冲频率调制方式,混合调制方式)的区别,并对降压型DC-DC的稳定性及补偿网络参数设计进行了详细分析,为该芯片的设计和仿真实现提供了全面的准备工作。本论文中的降压型DC-DC电源管理芯片采用恒定导通时间控制,在重载时采用连续导通模式,轻载时可以强制为连续导通模式也可以工作非连续导通(DCM)模式,使其效率可以高达92%。该芯片实现了4.5V到28 V的宽输入的电压范围,0.6 V到5 V的宽输出的电压范围,采用电流模控制,使得该芯片有快速的瞬态响应速度。芯片采用谷值电流模式控制方式,不管是在轻载还是在重载的情况下,该芯片都能够实现较高的效率转换,由于该芯片采用的恒定导通时间和谷值电流模式的控制方式,使得在上一个周期产生的误差信号带不到下一个周期,所以即使在占空比大于%50的情况下也不会产生亚谐波振荡,不需要斜坡补偿电路。该芯片加入软启动电路,使误差放大器的输出comp端在上电启动时缓慢上升,从而消除了上电时的浪涌电流。此外,芯片上还集成了短路保护,过压保护OV,欠压保护UV等各种保护电路。本文研究的恒定导通时间和谷值电流检测降压型DC/DC转换器芯片是基于0.35um BCD工艺设计,使用Cadence spectre软件搭建芯片的各个电路模块,并对单个模块和整体电路进行了设计和各个Corner的仿真,仿真结果表明单个模块和整体电路的仿真结果满足整体芯片的要求,具有良好的电压调整率和负载调整率,效率可以达到92%。该芯片的整体电路已经设计并仿真完成。
[Abstract]:With the rapid development of electronic technology, all kinds of electronic products have been widely seen in our daily life. As the heart of electronic products, the performance of power management chip directly determines the life and life of electronic products. Therefore, in order to improve the performance of electronic products, the research and development of power management chips has become an important subject in the development of modern science and technology. Power management chips are developing towards low power consumption, low cost, small area and high conversion efficiency. In the power management chip, DC-DC switching power supply has the advantages of low power consumption, high conversion efficiency and low cost, but it is difficult to integrate the whole system into one chip. In recent years, DC-DC switching power supply has been widely used, especially in high power applications. This paper mainly studies the design, simulation and realization of the power supply management chip of DC-DC in BCD process. In this paper, a Buck DC-DC power supply management chip with wide voltage input range, wide voltage output range and high current output is designed from electrical characteristic index to circuit design and circuit performance simulation. This paper first introduces the development of power management chip and the significance of power chip research, then introduces the topology of three DC-DC Buck boost and Buck / boost, and introduces the basic working principle of reduced voltage DC-DC in detail. The difference between voltage mode control and current mode control, as well as the working principle of continuous and discontinuous conduction mode, three different step-down DC-DC modulation modes (pulse width modulation, pulse frequency modulation), The stability of the DC-DC and the design of the compensation network parameters are analyzed in detail, which provides a comprehensive preparation for the design and simulation of the chip. In this paper, the step-down DC-DC power supply management chip adopts constant on-time control, continuous on-on mode at heavy load, and can be forced into continuous on-mode or discontinuous on-DCM mode at light load, making its efficiency as high as 92%. The wide input voltage range of 4.5V to 28V and the wide output voltage range of 0.6 V to 5V are realized in the chip. The current mode control is used to make the chip have a fast transient response speed. The chip adopts valley current mode control mode, whether in light load or heavy load, the chip can achieve high efficiency conversion, because of the constant on-time and valley current mode control mode. Because the error signal produced in the last period is less than the next period, there is no subharmonic oscillation even if the duty cycle is larger than P, and no ramp compensation circuit is needed. By adding soft start circuit, the output comp of the error amplifier rises slowly when the power is on, thus eliminating the surge current when the power is on. In addition, the chip also integrated short circuit protection, over-voltage protection OV, under-voltage protection UV and other protection circuits. The DC/DC converter chip of constant on-time and valley current detection in this paper is based on the 0.35um BCD process design. Each circuit module of the chip is built with Cadence spectre software. The single module and the whole circuit are designed and the simulation results of each Corner show that the simulation results of the single module and the whole circuit meet the requirements of the whole chip, and have good voltage adjustment rate and load adjustment rate. Efficiency can reach 92. The whole circuit of the chip has been designed and simulated.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM46

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