超级电容串联储能系统的并联电容均压方法

发布时间：2018-09-05 21:18

【摘要】：针对现有超级电容串联模组均压电路对A/D采样电路精度要求高,均压速度受串联电容数量影响大的瓶颈问题,该文提出一种超级电容串联模组并联电容均压方法,包括通过开关与电感级联的并联电容均压电路和开关控制方法。该文基于离散时域法对储能系统状态向量进行了分析,验证了该均压电路的均压特性。应用时域仿真验证了计算结果。通过静置仿真试验验证4支电容均压时间与2支电容均压时间相同。最后该文进行了物理试验,设计了试验样机。理论分析、仿真和物理试验结果验证了该方法在超级电容模组静置、充电、放电工况下都具有均压作用,均压过程无需调用采样电路数据既可实现电压均衡,均压速度受串联电容数量影响小。
[Abstract]:In order to solve the bottleneck problem that the current supercapacitor series module voltage equalizing circuit requires high precision of the A / D sampling circuit and the voltage sharing speed is greatly affected by the number of series capacitors, this paper presents a voltage equalization method for the parallel capacitor of the super capacitor series module group. It includes a parallel capacitor voltage sharing circuit and a switching control method through a switch and inductance cascade. In this paper, the state vector of energy storage system is analyzed based on discrete time domain method, and the voltage sharing characteristic of the circuit is verified. The calculation results are verified by time domain simulation. The static simulation results show that the voltage equalizing time of the four capacitors is the same as that of the two capacitors. Finally, the physical experiment is carried out and the prototype is designed. The theoretical analysis, simulation and physical test results show that this method can achieve voltage equalization under the condition of supercapacitor module statics, charging and discharging, and voltage equalization can be realized without calling sampling circuit data during the voltage equalization process. The average voltage speed is less affected by the number of series capacitors.
【作者单位】：中国农业大学信电学院;渤海大学工学院;
【基金】：国家863高技术基金项目(2012AA050217)
【分类号】：TM53

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