低压差线性稳压器的设计与实现

发布时间：2018-11-12 09:16

【摘要】：随着便携式电子产品越来越普及，人们对电源管理芯片的需求越来越多。作为电源管理芯片庞大家族中的一员，低压差（LDO，Low Drop-Out）线性稳压器以其极低的输入输出电压差、小的输出纹波、低的输出噪声、低静态电流以及低成本等优势，广泛应用于便携式电子产品中，比如，医疗、无线通讯工具、音频设备、PDA（个人数字助理）以及汽车电子等。目前，LDO线性稳压器正朝着更小尺寸、更低功耗、更高效率等方向发展，应用前景十分广阔，因此深入研究高性能的LDO线性稳压器仍具有十分重要的现实意义。本文首先分析了电源管理芯片的研究价值和对比了LDO线性稳压器与其它稳压器的优缺点；然后研究了LDO线性稳压器的系统结构，并对系统中各模块的性能参数进行了研究；分别设计了稳压器的子模块，并给出了仿真结果；研究了LDO线性稳压器的稳定性问题，给出了几种频率补偿方法；最后进行了整体仿真。本文设计的LDO低压差线性稳压器有五个主要部分组成，分别是参考基准，误差放大器，功率管，反馈网络以及保护电路。其中，，重点设计了参考基准电压源，通过引入高阶补偿，获得了较低温度系数的带隙基准；设计了带密勒补偿的误差放大器，提高了LDO线性稳压芯片的整体性能；研究了功率管的工作原理，选取了合适的管子尺寸；为了保证整个系统的稳定性，研究分析了几种常用的频率补偿方法；最后，为了保障芯片工作的安全性，设计了相关的保护电路，包括过流保护电路和过压保护电路。在文章的最后对整个LDO线性稳压器进行了仿真分析。本文利用Cadence公司的Spectre仿真软件，采用上华CSMC0.5μm CMOS工艺模型库，在室温下，对所设计的LDO进行了整体仿真。仿真结果表明：LDO线性稳压器可在3V-5V电源电压下工作，典型输出电压为3V，最低漏失电压仅为60mV，线性调整率和负载调整率分别为0.044%和0.177%，电源纹波抑制比为-64dB，另外该设计还具有良好的瞬态特性和交流特性，能够满足设计要求。
[Abstract]:With the increasing popularity of portable electronic products, there is more and more demand for power management chips. As a member of a large family of power management chips, low voltage difference (LDO,Low Drop-Out) linear regulators have the advantages of very low input and output voltage difference, small output ripple, low output noise, low static current and low cost. Widely used in portable electronic products, such as medical, wireless communication tools, audio equipment, PDA (personal digital assistant) and automotive electronics. At present, LDO linear regulators are developing towards smaller size, lower power consumption, higher efficiency and so on, and the application prospect is very broad. Therefore, it is still of great practical significance to study the high performance LDO linear regulators. This paper first analyzes the research value of the power management chip and compares the advantages and disadvantages between the LDO linear regulator and other regulators, then studies the system structure of the LDO linear voltage regulator, and studies the performance parameters of each module in the system. The sub-modules of the regulator are designed, and the simulation results are given. The stability of the LDO linear regulator is studied, and several frequency compensation methods are given. Finally, the overall simulation is carried out. The LDO low voltage difference linear regulator designed in this paper is composed of five main parts, which are reference, error amplifier, power transistor, feedback network and protection circuit. Among them, the reference voltage source is designed, the bandgap reference with low temperature coefficient is obtained by introducing high-order compensation, the error amplifier with Miller compensation is designed, and the overall performance of LDO linear voltage stabilized chip is improved. In order to ensure the stability of the whole system, several common frequency compensation methods are studied and analyzed. Finally, in order to ensure the security of the chip, the related protection circuits are designed, including over-current protection circuit and over-voltage protection circuit. At the end of the paper, the whole LDO linear regulator is simulated and analyzed. In this paper, using the Spectre simulation software of Cadence Company and CSMC0.5 渭 m CMOS process model library of Shanghai China, the overall simulation of the designed LDO is carried out at room temperature. The simulation results show that the LDO linear voltage regulator can work under the 3V-5V power supply voltage. The typical output voltage is 3 V, the lowest leakage voltage is only 60 MV, the linear adjustment rate and load adjustment rate are 0.044% and 0.177%, respectively. The ripple suppression ratio of power supply is -64dB. in addition, the design also has good transient and AC characteristics, which can meet the design requirements.
【学位授予单位】：武汉科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TM44

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