基于PCI协议的内部仲裁器的验证
发布时间:2018-03-09 01:02
本文选题:PCI 切入点:仲裁 出处:《西安电子科技大学》2015年硕士论文 论文类型:学位论文
【摘要】:随着集成电路的不断发展,产品功能的多样性和系统的复杂性,使得设计验证必须更加严谨,我们必须更加努力的去保证设计的正确性。我们需要选择合适的验证方法和高效的验证平台,才能提高对复杂芯片验证的效率。PCI总线,是系统中常用的总线之一,从低端的移动领域到高端的处理器,我们都可以找到它的应用。为了满足应用要求,系统结构越来越复杂。但是,单一的PCI总线上,负载的设备数目是有限的。为了实现总线的扩展,通常使用桥设备,来形成分级的总线结构。为了能够支持这种复杂的总线结构,提高总线使用的效率,我们需要一种灵活的仲裁方法,来分配总线的使用权。验证工作,在当代集成电路设计中所占的时间和资源都远大于设计工作。所以本文主要的工作量也集中在验证部分。在建立验证方案后,最重要的工作就是搭建验证平台。本文搭建的验证平台,不仅仅是针对仲裁模块,而是适用于整个芯片的验证平台,需要能够支持整个芯片的所有验证工作。课题中对验证平台的结构、功能,和常用任务进行了详细描述。搭建验证平台也是本文的主要工作。本文研究的对象是一款PCI-PCI总线桥,先从芯片的实际应用环境和基本功能入手,简单介绍了相关的PCI协议。以固定优先级算法和循环优先级算法为基础,对其内部仲裁器算法进行研究。然后,从验证方法学的角度,提出了验证方案,并且建立了验证平台。最后使用Nc_verilog作为验证工具,通过仿真验证,验证了芯片内部仲裁器符合预期设计要求,根据覆盖率信息分析了验证工作的可靠性。并且对芯片初样进行了部分参数的测试。本文主要内容是第四章和第五章。主要的工作内容是芯片验证平台的搭建和对芯片内部仲裁器进行功能验证。验证平台的建立和对芯片内部仲裁器的验证,为其他验证工作和设计工作,提供了重要参考价值。最后,本文中的桥片,通过了Nc-verilog软件进行的前仿验证和后续的其他验证工作。结果证明,本文所选用的验证方式,满足了预期的验证要求。建立的验证方案,覆盖了芯片的功能验证要求,对芯片进行了科学合理的验证仿真。
[Abstract]:With the continuous development of integrated circuits, the variety of product functions and the complexity of the system, the design verification must be more rigorous. We must make more efforts to ensure the correctness of the design. We need to choose the appropriate verification method and efficient verification platform to improve the efficiency of the verification of complex chips. PCI bus is one of the commonly used buses in the system. From the low-end mobile field to the high-end processor, we can find its application. In order to meet the requirements of the application, the system structure is becoming more and more complex. However, on a single PCI bus, The number of loaded devices is limited. In order to achieve bus expansion, bridge devices are usually used to form a hierarchical bus structure. We need a flexible arbitration method to allocate the right to use the bus. The time and resources in the modern IC design are much larger than the design work. So the main workload of this paper is also concentrated in the verification part. The most important work is to build the verification platform. The verification platform built in this paper is not only for the arbitration module, but also for the entire chip verification platform. We need to be able to support all the verification work of the whole chip. The structure, function, and common tasks of the verification platform are described in detail in this paper. Building the verification platform is also the main work of this paper. The object of this paper is a PCI-PCI bus bridge. Starting with the practical application environment and basic functions of the chip, this paper briefly introduces the related PCI protocol. Based on the fixed priority algorithm and the cyclic priority algorithm, the internal arbiter algorithm is studied. From the point of view of verification methodology, the verification scheme is put forward, and the verification platform is established. Finally, Nc_verilog is used as the verification tool, and through simulation verification, it is verified that the internal arbiter of the chip meets the expected design requirements. The reliability of the verification is analyzed according to the coverage information, and some parameters of the chip are tested. The main contents of this paper are 4th and 5th chapters. The main work is the construction of the chip verification platform and the implementation of the chip verification platform. Verify the function of the internal arbiter of the chip, establish the verification platform and verify the internal arbiter of the chip, It provides an important reference value for other verification work and design work. Finally, the bridge piece in this paper has passed the pre-imitation verification and other subsequent verification work carried out by Nc-verilog software. The results show that the verification method chosen in this paper, The proposed verification scheme covers the functional verification requirements of the chip and makes a scientific and reasonable verification simulation of the chip.
【学位授予单位】:西安电子科技大学
【学位级别】:硕士
【学位授予年份】:2015
【分类号】:TN407
【参考文献】
相关硕士学位论文 前1条
1 张亮;PCIe总线物理层的设计与验证[D];西安电子科技大学;2013年
,本文编号:1586299
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