宽带功放数字预失真设计与实现

发布时间：2018-03-09 03:06

本文选题：数字预失真　切入点：高效功率放大器　出处：《电子科技大学》2015年硕士论文　论文类型：学位论文

【摘要】：高效功率放大器作为发射链路的末级,其功能是将发射信号进行功率放大。但是随着通信技术的发展,新的通信模式对高效功率放大器提出了新的挑战。首先业务需求量的增加导致调制方式由恒包络向非恒包络转变,提高了信号峰均比,影响了系统的通信质量;其次传输带宽的增加对线性化技术提出了新的要求。为了充分利用频谱资源,采用了新的调制解调方式(QPSK,64QAM,OFDM等),这就要求改善功放的非线性失真;最后对功率放大器的数学建模增加了工程实现的复杂度。采用Volterra级数建模,随着其阶数的提高,工程实现的复杂度呈现指数增长,计算成本增大。针对以上面临的问题,本文给出了一种实现简单、工程成本低、线性补偿能力强并且效率高的宽带功放数字预失真实现,具体包括以下方面:(1)通过分析宽带功放数字预失真的关键技术,提出了宽带功放数字预失真系统的需求,然后从模型辨识算法(LMS算法、LS算法、RLS算法)、功放模型(Volterra级数、MP模型、SRPV模型)和查找表结构等方面进行方案的设计分析。(2)宽带功放数字预失真的FPGA(Field Programable Gate Aray)设计实现。按照FPGA开发流程,将工程划分为五个模块,分别是信号产生、输出功率调整、数字预失真计算、多项式参数产生和高速数据采集接口并对其进行设计,并且对FPGA的资源使用进行分析。(3)进行宽带功放数字预失真的性能测试与分析。搭建宽带功放数字预失真的系统验证平台,对数字预失真的性能进行测试。首先测试ADC接口和DAC接口,然后分别对带宽为100MHz和20MHz的信源进行系统测试并达到技术指标要求。本文的研究验证了可以用FPGA芯片完成数字预失真设计,并能达到改善功放非线性失真的效果,对工程应用的可行性与有效性提供了依据。在数字部分做预失真也降低了工程复杂度和运行成本。
[Abstract]:As the last stage of transmission link, the function of high efficiency power amplifier is to amplify the transmitted signal. But with the development of communication technology, The new communication mode poses a new challenge to the high efficiency power amplifier. Firstly, the increase of service demand leads to the change of modulation mode from constant envelope to non-constant envelope, which improves the PAPR and affects the communication quality of the system. Secondly, the increase of transmission bandwidth puts forward new requirements for linearization technology. In order to make full use of the spectrum resources, a new modulation and demodulation method is adopted, such as QPSKZ64QAM OFDM, which requires the improvement of nonlinear distortion of power amp; amp; amp; amp; amp; amp; amp; amp; amp; amp; amp; amp; amp; amp; Finally, the mathematical modeling of power amplifier increases the complexity of engineering implementation. With the increase of order of Volterra series, the complexity of engineering implementation increases exponentially and the computational cost increases. This paper presents a digital predistortion realization of wideband power amplifier with simple implementation, low engineering cost, strong linear compensation ability and high efficiency, including the following aspects: 1) by analyzing the key technology of broadband power amplifier digital predistortion, The requirement of wideband power amplifier digital predistortion system is put forward. Then, the design and implementation of FPGA(Field Programable Gate Aray for digital predistortion of wideband power amplifier are carried out from the following aspects: model identification algorithm / LMS algorithm / LS algorithm / RLS algorithm, power amplifier model / Volterra series / MP model / SRPV model) and lookup table structure etc. Follow the FPGA development process, The project is divided into five modules: signal generation, output power adjustment, digital predistortion calculation, polynomial parameter generation and high-speed data acquisition interface. And the resource usage of FPGA is analyzed. (3) the performance test and analysis of digital predistortion of broadband power amplifier are carried out, and the system verification platform of digital predistortion of broadband power amplifier is built. Test the performance of digital predistortion. First test the ADC interface and DAC interface. Then the signal sources with bandwidth of 100MHz and 20MHz are tested and the technical requirements are met. The research of this paper verifies that the digital predistortion design can be completed by using FPGA chip, and the nonlinear distortion of power amplifier can be improved. It provides the basis for the feasibility and validity of engineering application, and reduces the complexity and operation cost of the project by pre-distortion in the digital part.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN722.75

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