一种低功耗循环型模数转换器的设计

发布时间：2018-03-22 03:15

本文选题：NFC标签芯片　切入点：循环型模数转换器　出处：《安徽大学》2015年硕士论文　论文类型：学位论文

【摘要】：NFC标签是NFC技术的一种应用,NFC标签是基于ISO14443A协议,具有可读、重新写入的能力,用户可将其配置为只读。NFC标签已经广泛应用于人们的日常生活中,为人们的生产生活带来了极大的便利。由于NFC标签芯片是无源芯片,它是通过天线感应读卡器的磁场来获得芯片的能量,所以其芯片的工作电压会不稳定。本论文设计的这款低功耗循环型模数转换器,用于检测带隙基准产生的基准电压,然后反馈到芯片的数字部分,用于调节LDO的输出电压大小,使整个NFC芯片工作稳定。由于NFC标签主要应用于需大量使用的场合,例如电影海报、高档白酒防伪等,所以必须要求其保持高性能的同时需要低成本,减小标签里面的芯片尺寸是降低标签成本的有效方法。正是由于上述原因,该款循环型模数转换器(cyclic ADC)对传统循环型ADC的结构做了改进,目的是减小ADC的面积和功耗。本文在设计具体电路之前,对改进的循环型ADC的结构进行了建模,论证其功能是否能够实现。然后通过设计循环型各个子模块来代替,最后实现整个ADC的设计。由于NFC标签芯片要求低功耗,本论文设计的这款循环型ADC采用运放共享技术,以及单端结构,以减少电容和运放的数量,达到低功耗的目的。最终在SMIC 0.18μm工艺下,对所设计的循环型ADC进行了整体仿真。其指标如下：信噪失真比(SNDR)为56.8348dB,无杂散动态范围(SFDR)为62.8054dB,有效位数为9.1486位,功耗小于250uw,达到了低功耗的要求。
[Abstract]:NFC tag is an application of NFC technology. It is based on ISO14443A protocol and has the ability to read and rewrite. The user can configure it as read-only. NFC tag has been widely used in people's daily life. Because the NFC tag chip is a passive chip, it can obtain the energy of the chip through the magnetic field of the antenna sensing card reader. Therefore, the working voltage of the chip will be unstable. This low power cycle A / D converter designed in this paper is used to detect the reference voltage generated by the bandgap reference, and then feed back to the digital part of the chip to adjust the output voltage of the LDO. Make the whole NFC chip work stably. Because the NFC tag is mainly used in many occasions, such as movie poster, high-grade liquor anti-counterfeiting, so it must be required to maintain high performance and low cost. Reducing the chip size in the tag is an effective way to reduce the cost of the tag. It is for the above reasons that the cyclic ADC has improved the structure of the traditional cyclic ADC. The purpose of this paper is to reduce the area and power consumption of ADC. In this paper, the structure of the improved circular ADC is modeled before the specific circuit is designed, and the function can be realized. Finally, the design of the whole ADC is realized. Because the NFC tag chip requires low power consumption, the circulating ADC designed in this paper adopts the opo sharing technology and the single terminal structure to reduce the number of capacitors and operational amplifiers. To achieve the purpose of low power consumption, the overall simulation of the circular ADC is carried out in SMIC 0.18 渭 m process. The performance of the designed ADC is as follows: the signal-noise-to-noise ratio (SNDR) is 56.8348dB, the non-spurious dynamic range is 62.8054dB, and the number of significant bits is 9.1486 bits. The power consumption is less than 250 UW, which meets the requirement of low power consumption.
【学位授予单位】：安徽大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN792

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