多级运算放大器频率补偿方案的研究

发布时间：2018-05-22 17:51

本文选题：多级运算放大器 + 频率补偿　；参考：《北方工业大学》2015年硕士论文

【摘要】：运算放大器是集成电路的核心模块,广泛应用在数模转换器,模数转换器,电源管理等电路里。运放的性能直接影响了整体电路的性能,因此,运算放大器的设计成为当今集成电路领域的热点问题。随着集成电路技术的不断发展,电路集成度越来越高,MOS晶体管的尺寸越来越小,使电路设计逐渐进入深亚微米级。短沟道效应凸显,使得单级放大电路的本征增益减小。传统的两级运算放大电路已经不能满足需求。需要采用多级级联的方式获得较高的电压开环增益。但是,运算放大器的级联引入了额外的极点和零点,影响了运算放大器的稳定性。因此,需要采用频率补偿技术保证运算放大电路的闭环稳定性。本论文以传统的两级运算放大器为例,阐述了放大器的频率补偿原理,介绍了几种多级运算放大器的频率补偿结构。基于SMIC0.18μm工艺设计了一种三级运算放大器,在提供较大直流增益的同时,增加了输入输出摆幅。采用了合适的频率补偿结构对其进行补偿,仿真结果表明,本文所设计的三级运算放大器在3.3v电源电压下,负载为5pf电容时,直流开环增益为155dB,单位增益带宽达到了32MHz,相位裕度为56.09。,具有较理想的频率响应和瞬态响应,并且所需的补偿电容值较小,优化了芯片的面积,较容易在CMOS工艺下实现。增益和相位裕度均满足设计要求。
[Abstract]:Operational amplifier is the core module of integrated circuit. It is widely used in digital-to-analog converter, A / D converter, power management and so on. The performance of operational amplifier directly affects the performance of the whole circuit. Therefore, the design of operational amplifier has become a hot issue in the field of integrated circuit. With the development of integrated circuit technology, the size of MOS transistor becomes smaller and smaller, which makes the circuit design gradually enter deep sub-micron level. The short channel effect is prominent, which reduces the intrinsic gain of single stage amplifier. The traditional two-stage operation amplifier can not meet the demand. High voltage open loop gain is needed by multistage cascade. However, the cascade of operational amplifiers introduces additional poles and zeros, which affects the stability of operational amplifiers. Therefore, frequency compensation technique is needed to ensure the closed-loop stability of the operational amplifier. This paper takes the traditional two-stage operational amplifier as an example, expounds the principle of frequency compensation of amplifier, and introduces several kinds of multi-stage operational amplifier's frequency compensation structure. Based on SMIC0.18 渭 m process, a three-stage operational amplifier is designed, which not only provides a large DC gain, but also increases the input and output swing. The simulation results show that the three-stage operational amplifier designed in this paper is loaded with 5pf capacitor at 3.3v power supply voltage. The DC open-loop gain is 155dB, the unit gain bandwidth is 32MHz, the phase margin is 56.09.It has ideal frequency response and transient response, and the compensation capacitance is small. The area of the chip is optimized and it is easy to realize in CMOS process. Both gain and phase margin meet the design requirements.
【学位授予单位】：北方工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN722.77

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