OTP逻辑阵列设计实现研究

发布时间：2018-06-20 13:02

本文选题：OTP逻辑阵列 + 逻辑功能　；参考：《电子科技大学》2015年硕士论文

【摘要】：随着时代的发展,信息安全越来越受到重视,一次性可编程逻辑阵列在科学前进的道路中扮演了越来越重要的角色。OTP逻辑阵列具有较高可靠性,极强的抗辐照能力,可以广泛的运用于涉及到军事、航空航天等保密性极高和外界环境较为复杂的领域。本文的OTP逻辑阵列通过了测试,为将来设计出高性能的OTP FPGA提供参考。本文通过理论分析和测试,采用0.18μm CMOS的工艺,把实验室自主设计的OTP位元单元应用于电路,设计出了一款256bit的逻辑阵列。设计工作主要包括位元单元结构的设计,外围电路的设计,整体版图的设计以及流片后测试结果分析。本文首先介绍了OTP位元的结构以及其击穿原理,紧接着介绍了位元的工作机制。外围电路主要包括OTP逻辑阵列的各个功能模块实现电路:编程模块、读测试模块和功能实现模块,文中对各个模块中的关键电路的功能、原理进行了阐述,其中编程电路中采用了两级电荷泵的结构,产生可控制的编程外加高压,防止对芯片内部单元误击穿和避免对常压电路造成干扰;介绍了读电路中的两极DICE锁存结构和灵敏放大器的工作原理,保证正确快速的从位元单元中读取数据并且保证数据的稳定性;同时还阐述了逻辑功能单元中的CLB单元是如何实现逻辑功能,并且对各个电路进行功能仿真,给出了仿真结果。在设计实现的过程中,设计考虑了芯片面积、I/O端口和模块的布局、电路的布线问题,从电源规划到布局到布线,详细阐述了设计过程。设计时除了考虑面积的大小外,还需要考虑各个可制造性的问题,尽量优化设计,避免各个不良效应。通过物理验证DRC和LVS后,提取相应的寄生参数,得到实际设计后的各个精确参数,实现后仿真,仿真的结果基本达到预期要求。流片回来后,通过自主搭建的平台,分两步对芯片进行测试,从基本的读写功能到逻辑功能进行测试,基本功能均能实现,达到了芯片的设计期望。
[Abstract]:With the development of the times, more and more attention has been paid to the information security. The one-off programmable logic array has played a more and more important role in the progress of science. OTP logic array has high reliability and strong anti-irradiation ability. Can be widely used in military, aerospace and other areas of high confidentiality and complex external environment. The OTP logic array in this paper has passed the test, which provides a reference for designing high performance OTP FPGA in the future. In this paper, a 256bit logic array is designed by theoretical analysis and test, using 0.18 渭 m CMOS technology. The design work mainly includes the design of the bit unit structure, the peripheral circuit design, the design of the whole layout and the analysis of the test results after the flow sheet. This paper first introduces the structure of OTP bit and its breakdown principle, then introduces the working mechanism of OTP bit. The peripheral circuit mainly includes the realization circuit of each function module of OTP logic array: programming module, reading and testing module and function realization module. The function and principle of the key circuit in each module are expounded in this paper. The structure of the two-stage charge pump is used in the programming circuit, which produces the controllable programming and high voltage to prevent the breakdown of the internal unit of the chip and to avoid the interference to the normal voltage circuit. This paper introduces the bipolar DICE latch structure and the working principle of the sensitive amplifier in the reading circuit to ensure the correct and fast reading of data from the bit unit and the stability of the data. At the same time, how the CLB unit in the logic function unit realizes the logic function, and carries on the function simulation to each circuit, gives the simulation result. In the process of design and implementation, the layout of the chip area I / O port and module, the wiring of the circuit are considered, from the power source planning to the layout to the wiring, the design process is described in detail. In addition to considering the size of the area, it is necessary to consider the problems of manufacturability and optimize the design so as to avoid the adverse effects. After physical verification of DRC and LVS, the parasitic parameters are extracted, and the precise parameters are obtained. The simulation results basically meet the expected requirements. After the chip comes back, the chip is tested in two steps through the self-built platform, from the basic reading and writing function to the logic function, and the basic function can be realized, which meets the design expectation of the chip.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791

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