低功耗数字滤波器的设计与实现

发布时间：2018-06-28 03:15

本文选题：低功耗 + 近似计算　；参考：《电子科技大学》2016年硕士论文

【摘要】：近年来,生物医学设备、物联网、可穿戴设备以及手机等便携式设备的发展越来越快,越来越强大的处理功能,越来越快的运行速度,不可避免的带来了庞大的功耗。并且,随着工艺线宽的不断缩小,芯片的功率密度不断上升,然而电池技术一直没有突破性进展,因此电池的续航能力成为了制约这些便携式设备发展的一大重要原因。因此,低功耗技术的发展势在必行。在数字信号处理方向,数字滤波器由于其各种优点被广泛应用,其中FIR滤波器凭借其线性相位特性尤其受到青睐,并且常被应用于如助听器一类的医疗设备中。所以,研究FIR滤波器有非常广阔的应用前景。同时,由于数字电路一般都是根据最差情况设计的,然而这种最差情况极少出现,所以势必会造成资源浪费。因此,可以通过牺牲一部分结果精确度的办法来降低资源消耗,这就是近似计算理论。近似计算理论最早应用于计算机系统中,而后凭借其优秀的效果被广泛应用于各个领域。本文基于近似计算理论,在硬件、功耗等资源消耗与运算结果精确度之间进行权衡,设计了一种低功耗数字FIR滤波器。首先,本文介绍了半导体集成电路的发展趋势和现在所面临的困难,阐述了研究低功耗技术的价值,并对数字信号处理系统的发展作了介绍,分析了设计数字滤波器的意义。其次,本文介绍了数字电路功耗的组成部分,产生原因以及计算方式,从设计层次入手介绍了一些低功耗技术方法,并且介绍了数字滤波器的基础理论与近似计算理论。之后,本文研究了数字电路中非常常用的乘法器,设计了一种非常适用于数字滤波器的,补偿电路简单并且误差较小的基于CSD编码的截位补偿乘法器,在保持性能不变的情况下,可以降低50%的功耗。然后,本文设计了一种基于近似计算理论的,滤波器阶数与系数动态可调的低功耗数字FIR滤波器,并且进行了后端设计与仿真分析,验证了本文所设计低功耗数字滤波器功能正确,并且能够在牺牲一部分计算精度的情况下,大幅度降低功耗,最多可以降低大约70%的功耗。本文所设计的低功耗数字滤波器采用的是0.13μm标准CMOS工艺进行的设计及仿真分析。
[Abstract]:In recent years, the development of biomedical devices, Internet of things, wearable devices, mobile phones and other portable devices is becoming more and more rapid, more and more powerful processing functions, faster and faster running speed, which inevitably brings huge power consumption. With the continuous reduction of the process line width, the power density of the chip is increasing. However, there has been no breakthrough in battery technology, so the battery life ability has become an important factor restricting the development of these portable devices. Therefore, the development of low-power technology is imperative. In the direction of digital signal processing, digital filters are widely used because of their various advantages, among which Fir filters are particularly popular because of their linear phase characteristics, and are often used in medical devices such as hearing aids. Therefore, the study of Fir filter has a very broad application prospects. At the same time, because digital circuits are generally designed according to the worst case, however, this kind of worst-case rarely occurs, so it will lead to waste of resources. Therefore, resource consumption can be reduced by sacrificing some of the accuracy of results, which is called approximate computing theory. Approximate computing theory was first applied to computer systems, and then widely used in various fields by virtue of its excellent effect. Based on approximate computing theory, a low power digital Fir filter is designed based on the trade-off between hardware, power consumption and the accuracy of computing results. First of all, this paper introduces the development trend of semiconductor integrated circuit and the difficulties it faces now, expounds the value of studying low-power technology, introduces the development of digital signal processing system, and analyzes the significance of designing digital filter. Secondly, this paper introduces the components, causes and calculation methods of digital circuit power consumption, introduces some low-power technical methods from the design level, and introduces the basic theory and approximate calculation theory of digital filter. After that, this paper studies the multiplier which is very common in digital circuit, and designs a kind of truncated compensation multiplier based on CSD coding, which is very suitable for digital filter, which is simple in compensation circuit and small in error. The power consumption can be reduced by 50% while keeping the performance constant. Then, a low power digital Fir filter is designed based on approximate calculation theory, the order and coefficient of the filter are dynamically adjustable, and the back-end design and simulation analysis are carried out. It is verified that the low power digital filter designed in this paper is correct and can greatly reduce the power consumption by about 70% at the expense of some computational accuracy. The low power digital filter designed in this paper is based on 0.13 渭 m standard CMOS process.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN713.7

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