GaAs宽带单片低噪声放大器研究
发布时间：2018-07-14 17:26
【摘要】：砷化镓(GaAs)基单片微波集成电路性能优异、可靠性高,得到广泛应用。微波成像、无线通信、雷达探测、射电天文等领域的迅速发展,对微波电路的小型化、高性能、低功耗等方面的要求不断提高。单片低噪声放大器(LNA)作为接收机的第一级有源电路,其性能对接收机的噪声和灵敏度至关重要。本文对工艺模型进行了研究,并对电感、电容进行模型参数提取和验证。在模型研究的基础上,利用0.18μm砷化镓PHEMT工艺,设计了一款Ku波段单片低噪声放大器,该LNA为三级级联拓扑结构。采用自偏置技术,以方便芯片测试及使用。低噪放第一级采用源极负反馈技术,使最佳噪声阻抗和输入共轭匹配阻抗更接近,同时提高电路的稳定性。低噪放后两级采用并联反馈技术,以改善低噪放的增益平坦度。电路的输入匹配网络满足最佳噪声匹配并保证良好的端口驻波比,级间匹配网络将前级的输出与后级的输入直接匹配,有效减小了芯片面积,输出匹配网络将输出级匹配到50欧姆,以利于芯片在模块中使用。文中用到的无源器件模型研究方法及电路设计技术可为LNA设计提供参考。版图仿真结果表明,在12-18 GHz频段内,该LNA噪声系数低于2.2 dB,增益为25.7±0.5 dB,输入输出驻波比小于1.8,以上指标可满足点对点通信、相控阵雷达等应用。
[Abstract]:Gallium arsenide (GaAs)-based monolithic microwave integrated circuits are widely used for their excellent performance and high reliability. With the rapid development of microwave imaging, wireless communication, radar detection, radio astronomy and so on, the requirements of microwave circuits such as miniaturization, high performance and low power consumption have been raised. As the first stage active circuit of receiver, the performance of monolithic low noise amplifier (LNA) is very important to the noise and sensitivity of receiver. In this paper, the process model is studied, and the model parameters of inductance and capacitance are extracted and verified. Based on the model study, a Ku band monolithic low noise amplifier is designed using 0.18 渭 m GaAs pHEMT process. The LNA is a three-stage cascade topology. Adopt self-bias technology to facilitate chip test and use. In the first stage of the low noise amplifier, the source negative feedback technique is used to make the optimal noise impedance and the input conjugate matching impedance closer to each other, and the stability of the circuit is improved at the same time. In order to improve the gain flatness of low noise amplifier, parallel feedback technique is used in the two stages after low noise amplifier. The input matching network of the circuit satisfies the optimal noise matching and ensures a good standing wave ratio of ports. The interstage matching network directly matches the output of the front stage with the input of the next stage, which effectively reduces the chip area. The output matching network matches the output level to 50 ohms to facilitate the chip to be used in the module. The research method of passive device model and circuit design technology used in this paper can provide reference for LNA design. The layout simulation results show that the LNA noise coefficient is less than 2.2 dB, the gain is 25.7 卤0.5 dB and the input / output VSWR is less than 1.8 in the 12-18 GHz band. The above parameters can meet the requirements of point-to-point communication, phased array radar and so on.
【学位授予单位】：合肥工业大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN722.3
本文编号：2122377
[Abstract]:Gallium arsenide (GaAs)-based monolithic microwave integrated circuits are widely used for their excellent performance and high reliability. With the rapid development of microwave imaging, wireless communication, radar detection, radio astronomy and so on, the requirements of microwave circuits such as miniaturization, high performance and low power consumption have been raised. As the first stage active circuit of receiver, the performance of monolithic low noise amplifier (LNA) is very important to the noise and sensitivity of receiver. In this paper, the process model is studied, and the model parameters of inductance and capacitance are extracted and verified. Based on the model study, a Ku band monolithic low noise amplifier is designed using 0.18 渭 m GaAs pHEMT process. The LNA is a three-stage cascade topology. Adopt self-bias technology to facilitate chip test and use. In the first stage of the low noise amplifier, the source negative feedback technique is used to make the optimal noise impedance and the input conjugate matching impedance closer to each other, and the stability of the circuit is improved at the same time. In order to improve the gain flatness of low noise amplifier, parallel feedback technique is used in the two stages after low noise amplifier. The input matching network of the circuit satisfies the optimal noise matching and ensures a good standing wave ratio of ports. The interstage matching network directly matches the output of the front stage with the input of the next stage, which effectively reduces the chip area. The output matching network matches the output level to 50 ohms to facilitate the chip to be used in the module. The research method of passive device model and circuit design technology used in this paper can provide reference for LNA design. The layout simulation results show that the LNA noise coefficient is less than 2.2 dB, the gain is 25.7 卤0.5 dB and the input / output VSWR is less than 1.8 in the 12-18 GHz band. The above parameters can meet the requirements of point-to-point communication, phased array radar and so on.
【学位授予单位】：合肥工业大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN722.3
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