基于LEON3和AXI总线的SoC搭建与验证

发布时间：2018-07-20 15:14

【摘要】：随着集成电路的发展,对集成电路集成度和性能的要求也越来越高,在这种趋势下,在单个芯片上集成I/O设备、存储器、处理器等成为当前电路集成的主要形式,片上系统SoC也就应运而生。以IP复用为基础的SoC,以其集成度高、功耗低、体积小等优点成为目前芯片技术的主要发展方向。首先,本文对LEON3进行了分析,其采用可扩展处理器体系架构,具有可配置可综合的性质。另外LEON3具有全面的容错措施来保证它的可靠性,采用二进程的设计方法,使得代码的可读性增强、抽取级更高、仿真时间变短。其次,本文对AMBA总线协议研究分析,并分别对AHB、APB、AXI总线的特性及其传输方式进行了详细地总结。其中AXI总线作为AHB总线的扩展和延伸,保留了总线便于扩展、便于集成等优点,扩展了总线的性能与灵活性。AXI总线适合高带宽、高频率、高性能设计,在SoC设计中提供更高的性能。通过研究,本文得出AHB、APB、AXI总线之间的联系,研究如何实现它们之间的转换方法。本文设计了桥接器来实现总线协议的转换,其中通过状态机、控制器、计数器、FIFO等方式控制信号的转换来实现。根据不同总线协议之间的转换,本文设计了AHB to AXI桥接器、AXI to APB桥接器、AXI to AHB桥接器三个不同的桥接器,来实现LEON3与AXI总线的连接。最后,本文根据研究和分析,先完成了基于LEON3的SoC搭建过程,并在此基础上连接了实现将LEON3连接到AXI总线的桥接器,然后利用提供的软件开发环境和硬件设计工具,通过软硬件协同系统技术,实现基于LEON3和AXI总线的SoC的搭建。然后通过仿真工具ModelSim对所设计的桥接器进行仿真,验证其功能。将所搭建的SoC下载到FPGA上来建立SoC的原型,通过控制程序对SoC中连接在AXI总线上的GPIO通用接口、TIMER定时器进行控制,来验证基于LEON3和AXI总线的SoC的可行性。本文的结论说明通过所设计的桥接器可以实现基于LEON3和AXI总线的SoC的构建,在系统的验证方面,通过在芯片上建立SoC的原型,编写测试程序能达到理想的验证效果,对所搭建的SoC实现了验证,通过本文的研究有效地解决了LEON3与AXI总线连接的难题。
[Abstract]:With the development of integrated circuits, the integration and performance of integrated circuits are becoming more and more important. In this trend, the integration of I / O devices, memory and processors on a single chip becomes the main form of current circuit integration. SoC emerges as the times require. SoC based on IP reuse has become the main development direction of chip technology because of its advantages of high integration, low power consumption and small size. Firstly, this paper analyzes LEON3, which adopts extensible processor architecture and is configurable and comprehensive. In addition, LEON3 has a comprehensive fault-tolerant measure to ensure its reliability. By adopting the two-process design method, the readability of the code is enhanced, the extraction level is higher, and the simulation time is shortened. Secondly, the AMBA bus protocol is studied and analyzed in this paper, and the characteristic and transmission mode of AHBB bus are summarized in detail. AXI bus is the extension and extension of AHB bus, which retains the advantages of easy expansion and integration of the bus, and extends the performance and flexibility of the bus. AXI bus is suitable for the design of high bandwidth, high frequency and high performance. Provides higher performance in SoC design. In this paper, the relation between AHBs APBX and AXI bus is obtained, and how to realize the conversion between them is studied. In this paper, a bridge is designed to realize the conversion of bus protocol, which is controlled by state machine, controller, counter FIFO and so on. According to the conversion between different bus protocols, this paper designs three different bridges of AHB to AXI to APB bridge to realize the connection between LEON3 and AXI bus. Finally, according to the research and analysis, this paper first completes the SoC building process based on LEON3, and then connects the bridge to connect LEON3 to AXI bus, and then uses the software development environment and hardware design tools. SoC based on LEON3 and AXI bus is built by software and hardware co-system technology. Then the designed bridge is simulated by the simulation tool ModelSim to verify its function. The SoC is downloaded to FPGA to build the prototype of SoC, and the GPIO universal interface timer connected to AXI bus in SoC is controlled by the control program to verify the feasibility of SoC based on LEON3 and AXI bus. The conclusion of this paper shows that the SoC based on LEON3 and AXI bus can be constructed by the designed bridge. In the aspect of system verification, the test program can achieve the ideal verification effect by building the prototype of SoC on the chip. The SoC is validated, and the problem of connecting LEON3 to AXI bus is solved by the research in this paper.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN47

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