基于位流回读的FPGA测试系统的优化方法研究
发布时间：2018-08-18 18:02
【摘要】：随着当前半导体工艺的迅速发展,FPGA的复杂度和集成度也变得越来越高。随之而来的测试成本和测试时间的大幅增加也让FPGA可测性问题日渐凸显。所以在当前集成度日益提高的发展趋势下如何保证FPGA的可靠性显得至关重要。而当前主流的FPGA测试方法有:传统的硬件测试方法,基于ATE的测试方法,基于BIST的测试方法以及基于边界扫描的测试方法等。这些测试方法既有各自不同的优点,但也有明显的缺陷。如传统的硬件测试方法流程复杂并且耗时长,基于ATE的方法虽然速度快但成本高,而基于BIST的方法需要花费大量人力进行测试电路设计。基于边界扫描的方法也存在IO数目有限,测试速度较慢的缺点。所以找到一种成本低廉,具有较快测试速度的同时又切实可行的FPGA测试方法迫在眉睫。本论文从进一步推动FPGA测试技术的成熟出发,以实验室现有的基于位流回读和边界扫描的FPGA测试系统为基础,对测试系统面向的测试对象,测试系统的测试速度和测试系统自身可靠性和稳定性以及测试系统的易用性进行优化研究,推动该系统的进一步发展和成熟。并且通过将该测试系统移植到ARM嵌入式平台中,拓宽了该系统的应用领域,增强了该系统的灵活性和多样性。本论文的主要内容如下:(1)在大量查阅Xilinx公司相关技术文档的基础上,结合现有FPGA测试系统,实现针对Virtex系列型号为XCV600,XCV1000和VirtexⅡ系列型号为XC2V1000和XC2V3000这四款FPGA的位流回读和解析以及故障定位和诊断,并完成流程自动化。(2)在对部分位流回读技术进行深入研究的基础上实现针对CLB部分和BRAM部分的位流部分回读。并将该技术在测试系统中实现,以提高目前的测试速度。(3)在对现有FPGA测试系统反复研究的基础上对系统的架构和流程方面进行速度和可靠性的优化,希望进一步推动该测试系统的成熟。(4)在现有FPGA测试系统的基础上完成GUI图形化界面的实现,集成多种操作并具有不同工作模式,以达到提高系统易用性和测试效率的目的。(5)在针对PC版本的FPGA测试系统的基础上,通过搭建硬件平台和开发相应程序,完成基于Zedbord开发板的嵌入式测试系统。
[Abstract]:With the rapid development of semiconductor technology, the complexity and integration of FPGA become higher and higher. The resulting significant increase in test costs and test time also makes FPGA testability issues increasingly prominent. Therefore, it is very important to ensure the reliability of FPGA under the trend of increasing integration. The current mainstream FPGA testing methods include: traditional hardware testing methods, testing methods based on ATE, testing methods based on BIST and testing methods based on boundary scan. These test methods have their own advantages, but also have obvious shortcomings. For example, the traditional hardware testing method is complex and time-consuming, the method based on ATE is fast but high cost, while the method based on BIST needs a lot of manpower to design the test circuit. The method based on boundary scan also has the disadvantage of limited IO number and slow test speed. Therefore, it is urgent to find a cheap, fast and feasible FPGA testing method. In order to further promote the maturity of FPGA testing technology, based on the existing FPGA test system based on bit stream read back and boundary scan, this paper presents the test object oriented to the test system. The test speed, the reliability and stability of the test system and the ease of use of the test system are optimized, which promotes the further development and maturity of the system. By transplanting the test system to the ARM embedded platform, the application field of the system is broadened, and the flexibility and diversity of the system are enhanced. The main contents of this thesis are as follows: (1) based on a large number of Xilinx technical documents, combined with the existing FPGA testing system, To realize bit stream read and resolution, fault location and diagnosis for the four FPGA models of Virtex series XCV600U XCV1000 and Virtex 鈪，
本文编号：2190253
[Abstract]:With the rapid development of semiconductor technology, the complexity and integration of FPGA become higher and higher. The resulting significant increase in test costs and test time also makes FPGA testability issues increasingly prominent. Therefore, it is very important to ensure the reliability of FPGA under the trend of increasing integration. The current mainstream FPGA testing methods include: traditional hardware testing methods, testing methods based on ATE, testing methods based on BIST and testing methods based on boundary scan. These test methods have their own advantages, but also have obvious shortcomings. For example, the traditional hardware testing method is complex and time-consuming, the method based on ATE is fast but high cost, while the method based on BIST needs a lot of manpower to design the test circuit. The method based on boundary scan also has the disadvantage of limited IO number and slow test speed. Therefore, it is urgent to find a cheap, fast and feasible FPGA testing method. In order to further promote the maturity of FPGA testing technology, based on the existing FPGA test system based on bit stream read back and boundary scan, this paper presents the test object oriented to the test system. The test speed, the reliability and stability of the test system and the ease of use of the test system are optimized, which promotes the further development and maturity of the system. By transplanting the test system to the ARM embedded platform, the application field of the system is broadened, and the flexibility and diversity of the system are enhanced. The main contents of this thesis are as follows: (1) based on a large number of Xilinx technical documents, combined with the existing FPGA testing system, To realize bit stream read and resolution, fault location and diagnosis for the four FPGA models of Virtex series XCV600U XCV1000 and Virtex 鈪，
本文编号：2190253
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